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UPD6125AG の電気的特性と機能

UPD6125AGのメーカーはNECです、この部品の機能は「4-BIT SINGLE CHIP MICROCONTROLLER FOR REMOTE CONTROL TRANSMISSION」です。


製品の詳細 ( Datasheet PDF )

部品番号 UPD6125AG
部品説明 4-BIT SINGLE CHIP MICROCONTROLLER FOR REMOTE CONTROL TRANSMISSION
メーカ NEC
ロゴ NEC ロゴ 




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UPD6125AG Datasheet, UPD6125AG PDF,ピン配置, 機能
DATA SHEET
MOS INTEGRATED CIRCUIT
µPD6125A, 6126A
4-BIT SINGLE CHIP MICROCONTROLLER
FOR REMOTE CONTROL TRANSMISSION
DESCRIPTION
The µPD6125A and 6126A are 4-bit single-chip microcontrollers for infrared remote controllers for TVs, VCRs,
stereos, cassette decks, air conditioners, etc.
These microcontrollers consist of ROM, RAM, a 4-bit parallel-processing ALU, a programmable timer, key input/
output ports, and transmit output ports. Functioning is controlled in software.
FEATURES
Transmitter for programmable infrared remote
controller
19 types of instructions
Instruction execution time: 17.6 µs (with 455-kHz
ceramic oscillator)
Program memory (ROM) capacity: 1002 × 10 bits
Data memory (RAM) capacity: 32 × 5 bits
9-bit programmable timer: 1 channel
I/O pins (KI/O): 8 pins
I/O pins (I/O)
µPD6125A: 4 pins
µPD6126A: 8 pins
Input pins (KI): 4 pins
Serial input pins (S-IN): 1 pin
Transmission-in-progress indication pin (S-OUT):
1 pin
Transmit carrier frequency (REM)
fOSC/12, fOSC/8
Standby operation (HALT/STOP mode)
Low power consumption
Current consumption in STOP mode (TA = 25°C)
1 µA MAX.
Low-voltage operation: VDD = 2.0 to 6.0 V
Caution To use the NEC transmission format, ask NEC to supply the custom code.
The mask option (PLA data) setting of µPD6125A, µPD6126A is different from that of the µPD6125,
6126.
When a register is used as the operand of a branch instruction, do not use R0.
The information in this document is subject to change without notice.
Document No. U12392EJ4V0DS00 (4th edition)
(Previous No. IC-2014B)
Date Published May 1997 N
Printed in Japan
The mark shows major revised points.
©
1989

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UPD6125AG pdf, ピン配列
BLOCK DIAGRAM
ROM
D.P.
ROM
D.P.
L
H
PC(L)
PC(H)
1002 × 10 bit
ROM
MPX (L)
ROM
(H)
SP
ADD
DEC
µPD6125A, 6126A
32 × 5 bit
RAM
CNTL CNTL
(L) (H)
RAM
OSC
TIMER TIMER
(L) (H)
10 bit
MOD
ALU
ACC
KEY KEY
OUT(L) OUT(H)
KEY
IN
I/O Watchdog
timer
function
OSC-IN S-OUT REM
OSC-OUT
Note µPD6125A: I/O00-I/O03
µPD6126A: I/O00-I/O03, I/O10-I/O13
S-IN
KI/O0-KI/07
K I0-KI3 I/O Note
AC
DIFFERENCES AMONG PRODUCTS
Item
Part Number
µPD6125A
µPD6126A
ROM capacity
1002 × 10 bits (Mask ROM)
RAM capacity
32 × 5 bits
I/O pins
12 (KI/O0-7, I/O00-03)
16 (KI/O0-7, I/O00-03, I/O10-13)
S-IN pins
Provided
Current consumption
(fOSC = STOP) (MAX.)
1 µA
S-IN high level input
current (MAX.)
15 µA
Transmit carrier frequency
fOSC/12, fOSC/8
Low-voltage detection
(reset) circuit
Not provided
Supply voltage
VDD = 2.0 to 6.0 V
Package
• 24-pin plastic SOP
(300 mil)
• 24-pin plastic shrink DIP
(300 mil)
• 28-pin plastic SOP
(375 mil)
3


3Pages


UPD6125AG 電子部品, 半導体
µPD6125A, 6126A
5. DATA POINTER (R0)
R0 (R10, R00) for the data memory can serve as the data pointer for the ROM.
R0 specifies the low-order 8 bits in the ROM address. The high-order 2 bits in the ROM address are specified by
the control register.
Table referencing for ROM data can be easily executed by calling the ROM contents by setting the ROM address
to the data pointer.
When “all clear” is input or on reset, it becomes undefined.
Figure 5-1. Data Pointer Organization
Control registers
(P1 )
AD 9 AD 8
R10 R00
AD 7 AD 6 AD 5 AD 4 AD 3 AD 2 AD 1 AD 0 R 0
6. ACCUMULATOR (A) ……… 4 BITS
The accumulator (A) is a 4-bit register. The accumulator plays a major role in each operation.
When “all clear” is input or on reset, it becomes undefined.
Figure 6-1. Accumulator Organization
A3 A2
A1 A0
A
7. ARITHMETIC LOGIC UNIT (ALU) ……… 4 BITS
The arithmetic logic unit (ALU) is a 4-bit operation circuit, and executes simple operations, such as arithmetic
operations.
8. FLAGS
(1) Status flag
When the status for each pin is checked by the STTS instruction, if the condition coincides with the condition
specified by the STTS instruction, the status flag (F) is set (to 1).
When “all clear” is input or on reset, it becomes undefined.
(2) Carry flag
When the INC (increment) instruction or the RL (rotate left) instruction is executed, if a carry is generated from
the MSB for the accumulator, the carry flag (C) is set (to 1).
The carry flag (C) is also set (to 1), if the contents for the accumulator are “FH”, when the SCAF instruction is
executed.
When “all clear” is input or on reset, it becomes undefined.
6

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共有リンク

Link :


部品番号部品説明メーカ
UPD6125A

4-BIT SINGLE CHIP MICROCONTROLLER FOR REMOTE CONTROL TRANSMISSION

NEC
NEC
UPD6125ACA

4-BIT SINGLE CHIP MICROCONTROLLER FOR REMOTE CONTROL TRANSMISSION

NEC
NEC
UPD6125AG

4-BIT SINGLE CHIP MICROCONTROLLER FOR REMOTE CONTROL TRANSMISSION

NEC
NEC


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