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PDF UPD16772N Data sheet ( Hoja de datos )

Número de pieza UPD16772N
Descripción 480-OUTPUT TFT-LCD SOURCE DRIVER COMPATIBLE WITH 64-GRAY SCALES
Fabricantes NEC 
Logotipo NEC Logotipo



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DATA SHEET
MOS INTEGRATED CIRCUIT
µ PD16772
480-OUTPUT TFT-LCD SOURCE DRIVER
(COMPATIBLE WITH 64-GRAY SCALES)
DESCRIPTION
The µ PD16772 is a source driver for TFT-LCDs capable of dealing with displays with 64-gray scales. Data input is
based on digital input configured as 6 bits by 6 dots (2 pixels), which can realize a full-color display of 260,000 colors
by output of 64 values γ -corrected by an internal D/A converter and 5-by-2 external power modules. Because the
output dynamic range is as large as VSS2 + 0.1 V to VDD2 – 0.1 V, level inversion operation of the LCD’s common
electrode is rendered unnecessary. Also, to be able to deal with dot-line inversion, n-line inversion and column line
inversion when mounted on a single side, this source driver is equipped with a built-in 6-bit D/A converter circuit
whose odd output pins and even output pins respectively output gray scale voltages of differing polarity. Assuring a
clock frequency of 45 MHz when driving at 2.3 V, this driver is applicable to UXGA-standard TFT-LCD panels.
FEATURES
CMOS level input (2.3 to 3.6 V)
480 outputs
Input of 6 bits (gradation data) by 6 dots
Capable of outputting 64 values by means of 5-by-2 external power modules (10 units) and a D/A converter (R-
DAC)
Output dynamic range : VSS2 + 0.1 V to VDD2 – 0.1 V
High-speed data transfer : fCLK = 45 MHz (internal data transfer speed when operating at VDD1 = 2.3 V)
Apply for dot-line inversion, n-line inversion and column line inversion
Output voltage polarity inversion function (POL)
Display data inversion function (POL21/22)
Current consumption reduction function (LPC, Bcont)
Logic power supply voltage (VDD1) : 2.3 to 3.6 V
Driver power supply voltage (VDD2) : 8.5 V ± 0.5 V
ORDERING INFORMATION
Part Number
µ PD16772N-xxx
Package
TCP (TAB package)
Remark The TCP’s external shape is customized. To order the required shape, so please contact one of our
sales representatives.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. S14416EJ1V0DS00 (1st edition)
Date Published August 2000 NS CP (K)
Printed in Japan
The mark shows major revised points.
©
1999, 2000

1 page




UPD16772N pdf
µPD16772
Cautions 1. The power start sequence must be VDD1, logic input, and VDD2 & V0 to V9 in that order.
Reverse this sequence to shut down (Simultaneous power application to VDD2 and V0 to V9 is
possible.).
2. To stabilize the supply voltage, please be sure to insert a 0.1 µF bypass capacitor between
VDD1-VSS1 and VDD2-VSS2. Furthermore, for increased precision of the D/A converter, insertion
of a bypass capacitor of about 0.01 µF is also advised between the γ -corrected power supply
terminals (V0, V1, V2,....., V9) and VSS2.
Data Sheet S14416EJ1V0DS00
5

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UPD16772N arduino
µPD16772
9. CURRENT CONSUMPTION REDUCTION FUNCTION
The µ PD16772 has a low power control function (LPC) which can switch the bias current of the output amplifier
between two levels and a bias control function (Bcont) which can be used to finely control the bias current.
Low Power Control Function (LPC)
The bias current of the output amplifier can be switched between two levels using this pin (Bcont: Open).
LPC = H or Open: Low power mode
LPC = L: Normal power mode
The VDD2 of static current consumption can be reduced to two thirds of that in normal mode. Input a stable DC
current (VDD1/VSS1) to this pin.
Bias Current Control Function (Bcont)
It is possible to fine-control the current consumption by using the bias current control function (Bcont pin). When
using this function, connect this pin to the stabilized ground potential (VSS2) via an external resistor (REXT). When
not using this function, leave this pin open.
Figure 9–1. Bias Current Control Function (Bcont)
µ PD16772
Bcont
LPC
REXT
H/L
VSS2
Refer to the table below for the percentage of current regulation when using the bias current control function.
Table 9–1. Current Consumption Regulation Percentage Compared to Normal Mode
REXT Current Consumption Reguration Percentage
LPC = L
LPC = H/Open
(Open)
100%
65%
VDD1 = 3.3 V
50 k
120%
80%
VDD2 = 8.7 V
20 k
140%
100%
0
240%
210%
Remark The above current consumption regulation percentages are not product-characteristic
guaranteed as they are based on the results of simulation.
Caution Because the low-power and bias-current control functions control the bias current in the output
amplifier and regulate the over-all current consumption of the driver IC, when this occurs, the
characteristics of the output amplifier will simultaneously change. Therefore, when using these
functions, be sure to sufficiently evaluate the picture quality.
Data Sheet S14416EJ1V0DS00
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