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UPD16676のメーカーはNECです、この部品の機能は「1/16/ 1/32 DUTY LCD CONTROLLER/DRIVER」です。 |
部品番号 | UPD16676 |
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部品説明 | 1/16/ 1/32 DUTY LCD CONTROLLER/DRIVER | ||
メーカ | NEC | ||
ロゴ | |||
このページの下部にプレビューとUPD16676ダウンロード(pdfファイル)リンクがあります。 Total 20 pages
DATA SHEET
MOS INTEGRATED CIRCUIT
µPD16676
1/16, 1/32 DUTY LCD CONTROLLER/DRIVER
DESCRIPTION
µPD16676 is a controller/driver containing RAMs capable of full-dot LCD displays. One of these IC chips can drive
the full-dot LCD up to 61-by-16 dots.
These ICs are the most suitable for Kanji character or Chinese character pagers, as well as graphic pagers,
displaying 16-by-16 dots per character.
FEATURES
• LCD driver with built-in display RAM
• Dot display RAM: 2560 bits
• Output: 61 segments & 16 commons
• 8-bit parallel interface
• Oscillation circuit incorporated
• ORDERING INFORMATION
Part Number
µPD16676P
µPD16676W
µPD16676GF-3BA
Package
Chips
Wafer
100-PIN PLASTIC QFP (14 x 20 mm)
Remark Purchasing the above products in terms of chips per wafer requires an exchange of other documents as
well, including a memorandum of the product quality. Therefore, those who are interested in this regard
are advised to contact an NEC salesperson for further details.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. S10561EJ5V0DS00 (5th edition)
Date Published June 1999 NS CP(K)
Printed in Japan
The mark • shows major revised points.
©
1996
1 Page 2. PIN CONFIGURATION (Pad Layout)
50 49
51
52
32 31
30
29
µPD16676
79
80
81 82
99 100
2
1
Data Sheet S10561EJ5V0DS00
3
3Pages µPD16676
5. PIN DESCRIPTIONS
5.1 Power System
Pin Symbol
Pin Name
VDD Power supply pin
VSS Ground
VLC1 to VLC5
Reference power supply for
drivers
Pin No.
87
78
90,91,92,
94,95
I/O Function Description
— Power supply
— Ground
— Reference power supply for LCD driving
5.2 Logic system
Pin Symbol
Pin Name
M,/S
Master/Slave selection
FR LCD to AC signal
DB0 to DB7 Data Bus
A0 Data/Instruction Switching
/RESET
Reset and 68/80-series
switching
E(/RD)
Enable and read enable
R,/W(/WR)
OSC1
Read/Write and Write
enable
Oscillation pin
OSC2
Oscillation pin
Pin No.
93
89
79 to 86
73
88
76
77
74
75
I/O
Input
Input/
Output
Input/
Output
Input
Input
Input
Input
Input
Output
Function Description
Switches between the master chip and the slave
chip.
Exchanges synchronizing signals (LCD-to-AC
signals) in connecting cascades.
This pin is for output if the chip is the master, and for
input if the chip is the slave.
Data inputs/outputs
This pin is used for switching between the display
data and the instruction.
High level : Display data
Low level : Instruction
This pin performs reset at the edge of the low-level
pulse. At that level, it performs switching 68/80
series modes.
High level : 68 series MPU interface
Low level : 80 series MPU interface
68 series mode : Enable signal
80 series mode : Read enable signal
68 series mode : Read/Write signal
80 series mode : Write enable signal
Oscillation (connected with a register between
OSC2)
Oscillation (connected with a register between
OSC1)
5.3 Driver System
Pin Symbol
Pin Name
SEG0 to
SEG60
COM0 to
COM15
Segment
Common
Pin No.
72 to 12
I/O
Output
Description
Segment output pins
96 to 100,
1 to 11
Output
Common output pins
If the chip is a slave, these pins correspond to
COM16 to COM31.
6 Data Sheet S10561EJ5V0DS00
6 Page | |||
ページ | 合計 : 20 ページ | ||
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