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UPD16662のメーカーはNECです、この部品の機能は「240 OUTPUT LCD COLUMN SEGMENT DRIVER WITH BUILT-IN RAM」です。 |
部品番号 | UPD16662 |
| |
部品説明 | 240 OUTPUT LCD COLUMN SEGMENT DRIVER WITH BUILT-IN RAM | ||
メーカ | NEC | ||
ロゴ | |||
このページの下部にプレビューとUPD16662ダウンロード(pdfファイル)リンクがあります。 Total 30 pages
DATA SHEET
MOS INTEGRATED CIRCUIT
µPD16662
240 OUTPUT LCD COLUMN (SEGMENT) DRIVER WITH BUILT-IN RAM
The µPD16662 is a column (segment) driver which contains a RAM capable of full dot LCD drive.
With 240 outputs, this driver has a display RAM of 240 x 160 x 2 bits built in, and 4 gray scales of display are
possible. Any 4 gray scales can be selected from 25 levels of the gray scale pallet. The driver can be combined
with the µPD16667 to display from 240 x 160 dots to 480 x 320 dots.
Features
• Display RAM incorporated: 240 x 160 x 2 bits
• Logic voltage: 3.0V to 3.6V
• Duty: 1/160
• Output count: 240 outputs
• Capable of gray scale display: 4 gray scales (can be selected from 25 levels of the gray scale pallet)
• Memory management: packed pixel system
• 8/16-bit data base
Ordering Information
Part number
Package
µPD16662N -××× TCP(TAB)
• µPD16662N - 051 Standard TCP (OLB: 0.2 mm pitch; folding)
The TCP’s external shape is custom-ordered. Therefore, if you have a shape in mind, please contact an NEC
salesperson.
The information in this document is subject to change without notice.
Document No. S12738EJ3V0DS00 (3rd edition)
Date Published November 1998 NS CP (K)
Printed in Japan
The mark • shows major revised points.
©
1998
1 Page Block Diagram
DIR
PL0, PL1
TEST
A0 - A16
Control
/CS, /OE,
/WE, /UBE
RDY
BMODE
D0 - D15
Address
input
control
Address
management
control
Data bus
control
/REFRH
/RESET
MS
OSC1
OSC2
/DOFF
3.3 V operation
STOP
CR
oscillator
Liquid crystal
timing generation
PULSE /FRM STB
5.0 V operation
Arbiter
Gray scale
generation
circuit
Internal timing
generation
Self-diagnosis
circuit
Level shifter
RAM
240 x 160 x 2 bit
Data latch (1)
Data latch (2)
Gray level control
DEC
µPD16662
3.3 V operation
5.0 V operation
Liquid crystal drive circuit
240 outputs
PULSE
/FRM STB /DOUT L1 L2 Y1 Y2 Y3
Y240
V0
V1
V2
3
3Pages µPD16662
Data bus
The byte data lined up on the data bus is based on the Little Endian - an NEC/Intel-series bus.
1. 16 bit data bus (BMODE = L)
• Bytes (8 bytes) access
Addresses proceed as →
shown on right.
• Words (16 bits) access
D0 to D7
00000H
00002H
00004H
:
:
:
D8 to D15
00001H
00003H
00005H
:
:
:
Addresses proceed as →
shown on right.
D0 to D7
00000H
00002H
00004H
:
:
:
D8 to D15
For the access from the system to be performed in units of words (16 bits), or of bytes (8 bytes), the /UBE (high
byte enable) and A0 are used to show whether valid data are in the bytes of either (or both) of D0 to D7 and D8 to
D15.
/CS /OE /WE
HX X
LLH
LHL
LH
LX
Remark X : Don’t Care
Hi-Z : High impedance
H
X
/UBE
X
L
L
H
L
L
H
X
H
A0 MODE
I/ O
D0 to D7
D8 to D15
X
Not Selected
Hi-Z
Hi-Z
L
Read
Dout
H Hi-Z
L Dout
L
Write
Din
HX
L Din
X
Output disable
Hi-Z
H Hi-Z
Dout
Dout
Hi-Z
Din
Din
X
Hi-Z
Hi-Z
6
6 Page | |||
ページ | 合計 : 30 ページ | ||
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PDF ダウンロード | [ UPD16662 データシート.PDF ] |
データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
部品番号 | 部品説明 | メーカ |
UPD16661A | 160-OUTPUT LCD COLUMN SEGMENT DRIVER WITH RAM | NEC |
UPD16661AN | 160-OUTPUT LCD COLUMN SEGMENT DRIVER WITH RAM | NEC |
UPD16661AN-051 | 160-OUTPUT LCD COLUMN SEGMENT DRIVER WITH RAM | NEC |
UPD16662 | 240 OUTPUT LCD COLUMN SEGMENT DRIVER WITH BUILT-IN RAM | NEC |