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PDF UPB1502GR Data sheet ( Hoja de datos )
| Número de pieza | UPB1502GR | |
| Descripción | 1.7 GHz/ 2.0 GHz LOW-POWER TWO-MODULUS PRESCALER DIVIDED-BY-64/65/ 128/129 | |
| Fabricantes | NEC | |
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DATA SHEET
BIPOLAR DIGITAL INTEGRATED CIRCUITS
µPB1502GR, 1502GR(1)
1.7 GHz/ 2.0 GHz LOW-POWER TWO-MODULUS PRESCALER
DIVIDED-BY-64/65, 128/129
FEATURES
• High toggle frequency – 2.0 GHz: µPB1502GR(1), 1.7 GHz: µPB1502GR
• Low power consumption – 6.7 mA TYP. at 3 V
• Operating supply voltage – 2.7 V to 3.3 V
• High input sensitivity – 130 to 220 mVP-P: µPB1502GR(1), 100 to 320 mVP-P: µPB1502GR (@50 Ω)
• Equipped with power-save function: 5 µA (standard) on power-save mode.
• Packaged in 8 pins plastic SOP suitable for surface mounting.
DESCRIPTION
µPB1502GR and µPB1502GR(1) are two-modulus prescaler divided by 64/65 or 128/129. This device is designed for
mobile communication applications for example 0.8-1.9 GHz cellular and cordless telephones. The ICs operate on low power
and therefore are suitable for hand-held, battery-operated systems.
These products are manufactured using NEC’s 20 GHz fT NESAT™ III silicon bipolar process. This process uses silicon
nitride passivation film and gold metallization wirings. These materials can protect the chips from external pollution and
prevent corrosion and migration. Thus, these products have excellent performance, uniformity and reliability.
ORDER INFORMATION
ORDER NUMBER
µPB1502GR–E1
µPB1502GR(1)–E1
PACKAGE
8 pin plastic SOP
(225 mil)
SUPPLYING FORM
Embossed tape 12 mm wide. QTY 2.5 k/reel
Pin1 is in tape pull-out direction.
fin MAX.
1.7 GHz
2.0 GHz
Remarks To order evaluation samples, please contact your local NEC sales office. (Order number: µPB1502GR, µPB1502GR(1))
Caution electro-static sensitive devices
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for availability
and additional information.
Document No. P10871EJ3V0DS00 (3rd edition)
Date Published October 1999 N CP(K)
Printed in Japan
The mark shows major revised points.
©
1996, 1999
1 page  
µPB1502GR, 1502GR(1)
TEST CIRCUIT
1 000 pF
50 Ω
S.G.
50 Ω
C1
1 000 pF
2.7 to 3.0 V
1 000 pF
3.0 to 0 V
C2
C3
Oscillo-
Scope
3 pF
1 000 pF C4
1 MΩ
C5
5 pF
IN
VCC
SW
OUT
IN
VPS
M
GND
1 000 pF
C8
C7 1 000 pF
2.7 to 3.0 V
C6
1 000
pF
3.0 to 0 V
H
SW
L
M
HL
1/64 1/65
1/128
1/129
APPLICATION CIRCUIT FOR REFERENCE
1 000 pF
VCO
1 000
pF
VT
MIX
1 000 pF
1 000 pF
1 000 pF
1 000 pF
Buffer Amp.
2SC4093
( µPC2745T)
LPF
(µPB1502GR) 1 000 pF
IN IN
1 000 pF
1 000 pF
VCC VPS
SW M
OUT GND
1 000 pF
fIN
PLL
CP GND
TCXO
REF
M
EN
DATA
CLOCK
VCC
1 000 pF
CPU
1 000 pF
The application circuits and their parameters are for references only and are not intended for use in actual design-in's.
To know the real application circuits, please refer to PLL synthesizer LSI's documentations (e.g.µPD3160GS).
Data Sheet P10871EJ3V0DS00
5
5 Page 
PACKAGE DIMENSIONS
8 PIN PLASTIC SOP (225 mil) (UNIT: mm)
85
µPB1502GR, 1502GR(1)
detail of lead end
1
1.57 ± 0.2
1.49
5.2 ± 0.2
4
3°+−37°°
6.5 ± 0.3
4.4 ± 0.15
1.1 ± 0.2
1.27
0.42
+0.08
−0.07
0.1 ± 0.1
0.85 MAX.
0.12 M
0.6 ± 0.2
0.17
+0.08
−0.07
0.10
NOTE Each lead centerline is located within 0.12 mm of its true position (T.P.) at maximum material condition.
Data Sheet P10871EJ3V0DS00
11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet UPB1502GR.PDF ] | |
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