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PDF UPA1856 Data sheet ( Hoja de datos )

Número de pieza UPA1856
Descripción P-CHANNEL MOS FIELD EFFECT TRANSISTOR FOR SWITCHING
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DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ PA1856
P-CHANNEL MOS FIELD EFFECT TRANSISTOR
FOR SWITCHING
DESCRIPTION
The µPA1856 is a switching device which can be
driven directly by a 2.5-V power source.
The µPA1856 features a low on-state resistance and
excellent switching characteristics, and is suitable for
applications such as power switch of portable machine
and so on.
FEATURES
Can be driven by a 2.5-V power source
Low on-state resistance
RDS(on)1 = 45 mMAX. (VGS = –4.5 V, ID = –2.5 A)
RDS(on)2 = 48 mMAX. (VGS = –4.0 V, ID = –2.5 A)
RDS(on)3 = 72 mMAX. (VGS = –2.7 V, ID = –2.5 A)
RDS(on)4 = 77 mMAX. (VGS = –2.5 V, ID = –2.5 A)
PACKAGE DRAWING (Unit : mm)
85
1 :Drain1
2, 3 :Source1
4 :Gate1
5 :Gate2
6, 7 :Source2
8 :Drain2
1.2 MAX.
1.0±0.05
0.25
14
3°
+5°
–3°
0.1±0.05
0.5
0.6
+0.15
–0.1
3.15 ±0.15
3.0 ±0.1
6.4 ±0.2
4.4 ±0.1
1.0 ±0.2
ORDERING INFORMATION
PART NUMBER
PACKAGE
µPA1856GR-9JG
Power TSSOP8
0.65 0.8 MAX.
0.27
+0.03
–0.08
0.10 M
0.1
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
Drain to Source Voltage
VDSS
–20
Gate to Source Voltage
VGSS
±12
Drain Current (DC)
Drain Current (pulse) Note1
Total Power Dissipation Note2
ID(DC)
ID(pulse)
PT
±4.5
±18
2.0
Channel Temperature
Tch 150
Storage Temperature
Tstg –55 to +150
V
V
A
A
W
°C
°C
EQUIVALENT CIRCUIT
Drain1
Drain2
Gate1
Body
Diode Gate2
Body
Diode
Gate
Protection
Diode
Source1
Gate
Protection
Diode
Source2
Notes 1. PW 10 µs, Duty Cycle 1 %
2. Mounted on ceramic substrate of 5000 mm2 x 1.1 mm
Remark
The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage
exceeding the rated voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. D13808EJ2V0DS00 (2nd edition)
Date Published March 2000 NS CP(K)
Printed in Japan
The mark shows major revised points.
©
1998, 1999

1 page




UPA1856 pdf
µ PA1856
10000
1000
100
CAPACITANCE vs. DRAIN TO
SOURCE VOLTAGE
f = 1 MHz
VGS = 0V
Ciss
Coss
Crss
10
0.1
1 10
VDS - Drain to Source Voltage - V
100
SOURCE TO DRAIN DIODE FORWARD VOLTAGE
100
10
1
10000
SWITCHING CHARACTERISTICS
1000
100
VDD = 10 V
VGS(on) = 4.0 V
RG = 10
10
0.1
1
ID - Drain Current - A
tf
tr
td(on)
td(off)
10
DYNAMIC INPUT CHARACTERISTICS
8
ID = 4.5 A
6 VDD = 16 V
10 V
4
0.1 2
0.01
0.4
0.6 0.8
1.0 1.2
VF(S-D) - Source to Drain Voltage - V
0
0 1 2 3 4 5 6 7 8 9 10
QG - Gate Charge - nC
1000
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
100 62.5˚C/W
10
1
0.1
1m
10m
Mounted on ceramic substrate
of 5000 mm2 x 1.1 mm
Single Pulse
PD(FET1) : PD(FET2) = 1:1
100m
1
10
PW - Pulse Width - S
100 1000
Data Sheet D13808EJ2V0DS00
5

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