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UPA101B-E1 PDF Datasheet ( 特性, スペック, ピン接続図 )

部品番号 UPA101B-E1
部品説明 128 CROSSPOINT SWITCH WITH CONTROL MEMORY
メーカ Hynix Semiconductor
ロゴ Hynix Semiconductor ロゴ 



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UPA101B-E1 Datasheet, UPA101B-E1 PDF,ピン配置, 機能
GM62093A
GM62093A
12× 8 CROSSPOINT SWITCH
WITH CONTROL MEMORY
Description
The GM62093A contains a 12× 8 array of
crosspoint together with a 7 to 96 Line decoder
and latch circuits. The GM62093A employs
LG’s advanced high voltage CMOS process
technology. It provides extra low operating
current and low power dissipation.
Anyone of the 96 switchs can be addressed by
selecting the ap-propriate 7 input bits. The
selected turned on or off by applying a logical
one or zero to the data in and the strobe input
at logical one. A reset signal can be used to
turn off all the switches together when is
switched at logical one. The GM62093A is
avail-able in a 40 lead dual in-line plastic and
ceramic package.
Feature
• CMOS 12× 8 Cross Point Switch with
Control Memory
• Low On Resistance
• Internal Control Latches
Ron 15 Max
• Less Than 1% Total Distortion at 0 dbm
• Extra Low Operating Current
• Extra Low Cross-Talk Between Any Two
Switches
• Standard CMOS Noise Immunity
TTL Compatible Input
Pin Configuration
(Top View)
Y3
AY2
RESET
AX3
AX0
NC
NC
X6
X7
X8
X9
X10
X11
NC
Y7
NC
Y6
STROBE
Y5
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40 VDD
39 Y2
38 DATA
37 Y1
36 NC
35 Y0
34 NC
33 X0
32 X1
31 X2
30 X3
29 X4
28 X5
27 NC
26 NC
25 AY1
24 AY0
23 AX2
22 AX1
21 Y4
Application
• PBX Systems
• Mobile Radio
• Test Eqiepment Instrumentation
• Analog/ Digital Multiplexer
Block Diagram
STROBE
ADDRESS
AX0
AX1
AX2
AX3
AY0
AY1
AY2
DATA RESET
1 80
96 8 88
X0
7
95 X11
Y0 Yi Input (i=0~7)
Y7
1

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部品番号部品説明メーカ
UPA101B-E1

128 CROSSPOINT SWITCH WITH CONTROL MEMORY

Hynix Semiconductor
Hynix Semiconductor

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