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PDF TEA1064AT Data sheet ( Hoja de datos )
| Número de pieza | TEA1064AT | |
| Descripción | Low voltage versatile telephone transmission circuit with dialler interface and transmit level dynamic limiting | |
| Fabricantes | NXP Semiconductors | |
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INTEGRATED CIRCUITS
DATA SHEET
TEA1064A
Low voltage versatile telephone
transmission circuit with dialler
interface and transmit level
dynamic limiting
Product specification
File under Integrated Circuits, IC03A
March 1994
1 page  
Philips Semiconductors
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
Product specification
TEA1064A
PARAMETER
CONDITIONS
SYMBOL
MIN.
TYP. MAX. UNIT
Stabilized supply voltage application
R15 = 392 Ω;
R16 = 56 Ω
Supply for peripherals
DC line voltage
lline = 15 mA
Ip = 0 to 4 mA
lline = 15 mA
Ip = 2 mA
Ip = 4 mA
VCC2-SLPE
VLN
VLN
3.05
4.2
4.9
3.3 3.55 V
4.4 4.8 V
5.1 5.5 V
Note
1. For TEA1064AT the maximum line current depends on the heat dissipating qualities of the mounted device.
PINNING
handbook, halfpage
LN 1
20 SLPE
GAS1 2
19 VCC2
GAS2 3
18 AGC
QR− 4
17 REG
QR+ 5
16 VCC1
TEA1064A
GAR 6
15 PD
DLS/MMUTE 7
14 MUTE
MIC− 8
13 IR
MIC+ 9
12 DTMF
STAB 10
11 VEE
MGR057
Fig.2 Pinning diagram.
1 LN
2 GAS1
3 GAS2
4 QR−
5 QR+
6 GAR
7 DLS/
MMUTE
8 MIC−
9 MIC+
10 STAB
11 VEE
12 DTMF
13 IR
14 MUTE
15 PD
16 VCC1
17 REG
18 AGC
19 VCC2
20 SLPE
positive line terminal
gain adjustment; transmitting amplifier
gain adjustment; transmitting amplifier
inverting output, receiving amplifier
non-inverting output, receiving
amplifier
gain adjustment; receiving amplifier
decoupling for transmit amplifier
dynamic and microphone MUTE input
inverting microphone input
non-inverting microphone input
current stabilizer
negative line terminal
dual-tone multi-frequency input
receiving amplifier input
mute input
power-down input
internal supply decoupling
voltage regulator decoupling
automatic gain control input
reference voltage with respect to SLPE
slope adjustment for DC
curve/reference for peripheral circuits.
March 1994
5
5 Page 
Philips Semiconductors
Low voltage versatile telephone transmission circuit
with dialler interface and transmit level dynamic limiting
Product specification
TEA1064A
Microphone inputs MIC+ and MIC− and gain pins
GAS1 and GAS2
The TEA1064A has symmetrical microphone inputs, its
input impedance is 64 kΩ (2 × 32 kΩ) and its voltage
amplification is typ. 52 dB with R7 = 68 kΩ. Either
dynamic, magnetic or piezo-electric microphones can be
used, or an electret microphone with a built-in FET buffer.
Arrangements for the microphone types are shown in
Fig.12.
The gain of the microphone amplifier is proportional to
external resistor R7 connected between GAS1 and GAS2
and with this it can be adjusted between 44 dB and 52 dB
to suit the sensitivity of the transducer.
An external 100 pF capacitor (C6) is required between
GAS1 and SLPE to ensure stability. A larger value of C6
may be chosen to obtain a first-order low-pass filter with a
cut-off frequency corresponding to the time constant
R7 × C6.
handbook, full pagewidth
MIC+
9
(1)
MIC−
8
(a)
VCC1
MIC−
16
8
MIC+
9
11
VEE
(b)
MIC+
9
MIC−
8
MGR067
(c)
Fig.12 Microphone arrangements: a) magnetic or dynamic microphone, the resistor (1) may be connected to
reduce the terminating impedance, or for sensitive types a resistive attenuator can be used to prevent
overloading the microphone inputs; b) electret microphone; c) piezo-electric microphone.
Dynamic limiter (microphone) pin DLS/MMUTE
A low level at the DLS/MMUTE pin inhibits the microphone
inputs MIC+ and MIC− but has no influence on the
receiving and DTMF amplifiers.
Removing the low level at the DLS/MMUTE pin provides
the normal function of the microphone amplifier after a
short time determined by the capacitor connected to
DLS/MMUTE pin. The microphone mute function can be
realised by a simple switch as shown in Fig.13.
To prevent distortion of the transmitted signal, the gain of
the sending amplifier is reduced rapidly when peaks of the
signal on the line exceed an internally-determined
threshold. The time in which gain reduction is effected
(attack time) is very short. The circuit stays in the
gain-reduced condition until the peaks of the sending
signal remain below the threshold level. The sending gain
then returns to normal after a time determined by the
capacitor connected to DLS/MMUTE (release time).
The internal threshold adapts automatically to the DC
voltage setting of the circuit (voltage VLN-SLPE). This
means that the maximum output swing on the line will be
higher if the DC voltage dropped across the circuit is
increased.
Fig.14 shows the maximum possible output swing on the
line as a function of the DC voltage drop (VLN-SLPE) with
Iline − Ip as a parameter.
handbook, halfpage
R17
3.3 kΩ
DLS/MMUTE
7
VEE
11
MGR068
Fig.13 Microphone-mute function.
March 1994
11
11 Page | ||
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| PDF Descargar | [ Datasheet TEA1064AT.PDF ] | |
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