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USBUF01W6 の電気的特性と機能

USBUF01W6のメーカーはSTMicroelectronicsです、この部品の機能は「EMI FILTER AND LINE TERMINATION FOR USB UPSTREAM PORTS」です。


製品の詳細 ( Datasheet PDF )

部品番号 USBUF01W6
部品説明 EMI FILTER AND LINE TERMINATION FOR USB UPSTREAM PORTS
メーカ STMicroelectronics
ロゴ STMicroelectronics ロゴ 




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USBUF01W6 Datasheet, USBUF01W6 PDF,ピン配置, 機能
®
A.S.D.
USBUFxxW6
EMI FILTER AND LINE TERMINATION
FOR USB UPSTREAM PORTS
APPLICATIONS
EMI Filter and line termination for USB upstream
ports on:
- USB Hubs
- PC peripherals
FEATURES
s Monolithic device with recommended line termi-
nation for USB upstream ports
s Integrated Rt series termination and Ct bypass-
ing capacitors.
s Integrated ESD protection
s Small package size
DESCRIPTION
The USB specification requires upstream ports
to be terminated with pull-up resistors from the
D+ and D- lines to Vbus. On the
implementation of USB systems, the radiated
and conducted EMI should be kept within the
required levels as stated by the FCC
regulations. In addition to the requirements of
termination and EMC compatibility, the
computing devices are required to be tested for
ESD susceptibility.
The USBUFxxW6 provides the recommended line
termination while implementing a low pass filter to
limit EMI levels and providing ESD protection
which exceeds IEC61000-4-2 level 4 standard.
The device is packaged in a SOT323-6L which is
the smallest available lead frame package (50%
smaller than the standard SOT23).
BENEFITS
s EMI / RFI noise suppression
s Required line termination for USB upstream
ports
s ESD protection exceeding IEC61000-4-2 level 4
s High flexibility in the design of high density
boards
s Tailored to meet USB 1.1 standard
TM: ASD and TRANSIL are a trademarks of STMicroelectronics.
March 2002 - Ed: 3A
SOT323-6L
FUNCTIONAL DIAGRAM
3.3 V
Rt Rp
D1
Ct
Grd
Rt
D2
Ct
D4
3.3 V
D3
CODE 01
CODE 02
Tolerance
Rt
33
22
±10%
Rp
1.5k
1.5k
±10%
Ct
47pF
47pF
±20%
1/9

1 Page





USBUF01W6 pdf, ピン配列
APPLICATION EXAMPLE
Fig. A2: Implementation of ST' solutions for USB ports
USBUFxxW6
Downstream port
USBDF01W5
D+
Gnd
D-
D+ in
Gnd
D- in
Rt
Ct Rd
Ct Rd
Rt
CABLE
D+ out D+
D+
D- out
D-
D-
USBUF01W6
D2 Gnd D1
Upstream port
D+
Ct
Rt
D3
Ct
Rt
3.3 V
Rp
3.3V D4
D-
FULL SPEED CONNECTION
Downstream port
USBDF01W5
D+
Gnd
D-
D+ in
Gnd
D- in
Rt
Ct Rd
Ct Rd
Rt
CABLE
D+ out D+
D+
D- out
D-
D-
USBUF01W6
D2 Gnd D1
Upstream port
D+
Ct
Rt
D3
Ct
Rt
3.3 V
Rp
3.3V D4
D-
LOW SPEED CONNECTION
3/9


3Pages


USBUF01W6 電子部品, 半導体
USBUFxxW6
Fig. A7: Remaining voltage at both stages S1 (Vinput) and S2 (Voutput) during ESD surge.
Vin Vin
Vout
Vout
a. Positive surge
b.Negative surge
Please note that the USBUFxxW6 is not only acting for positive ESD surges but also for negative ones. For
these kinds of disturbances it clamps close to ground voltage as shown in Fig. A7b.
LATCH-UP PHENOMENA
The early ageing and destruction of IC’s is often due to latch-up phenomenon which is mainly induced by
dV/dt. Thanks to its structure, the USBUFxxW6 provides a high immunity to latch-up phenomenon by
smoothing very fast edges.
CROSSTALK BEHAVIOR
Fig. A8: Crosstalk phenomenon
RG1
Line 1
VG1
RG2 Line 2
RL1 α1 VG1 + β12 VG2
VG2 RL2 α2 VG2 + β21 VG1
DRIVERS
RECEIVERS
The crosstalk phenomenon is due to the coupling between 2 lines. The coupling factor ( β12 or β21 ) in-
creases when the gap across lines decreases, particularly in silicon dice. In the example above the ex-
pected signal on load RL2 is α2VG2, in fact the real voltage at this point has got an extra value β21VG1. This
part of the VG1 signal represents the effect of the crosstalk phenomenon of the line 1 on the line 2. This
phenomenon has to be taken into account when the drivers impose fast digital data or high frequency ana-
log signals in the disturbing line. The perturbed line will be more affected if it works with low voltage signal
or high load impedance (few k).
6/9

6 Page



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部品番号部品説明メーカ
USBUF01W6

EMI FILTER AND LINE TERMINATION FOR USB UPSTREAM PORTS

STMicroelectronics
STMicroelectronics


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