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UPD98401A の電気的特性と機能

UPD98401AのメーカーはNECです、この部品の機能は「ATM SAR CHIP」です。


製品の詳細 ( Datasheet PDF )

部品番号 UPD98401A
部品説明 ATM SAR CHIP
メーカ NEC
ロゴ NEC ロゴ 




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UPD98401A Datasheet, UPD98401A PDF,ピン配置, 機能
DATA SHEET
MOS INTEGRATED CIRCUIT
µPD98401A
ATM SAR CHIP
DESCRIPTION
The µPD98401A (NEASCOT-S15TM) is a high-performance SAR chip that segments and reassembles ATM cells.
This chip can interface with an ATM network when it is included in a workstation, computer, front-end processor,
network hub, or router. The µPD98401A conforms to the ATM Forum Recommendation, and provides the functions
of the AAL-5 SAR sublayer and ATM layer.
The µPD98401A is compatible with its predecessor, µPD98401, in terms of hardware and software.
Functions are explained in detail in the following User’s Manual. Be sure to read this manual when designing your
system.
µPD98401A User’s Manual: S12054E
FEATURES
• Conforms to ATM Forum
• AAL-5 SAR sublayer and ATM layer functions
• Hardware support of AAL-5 processing
• Processing of non-AAL-5 traffic (AAL-3/4 cell, OAM cell, RM cell) by software with raw cell processing function
• Hardware support of comparison/generation of CRC-10 for non-AAL-5 traffic
• Supports up to 32K virtual channels (VC)
• Provided with 16 traffic shapers that carry out transmission scheduling (control of average rate/peak rate) so as to
set different transmission rate for each VC
• Interface and commands for controlling PHY device
• Employs “UTOPIA interface” as cell data interface with PHY device
- Octet-level handshake
- Cell-level handshake
• 32-bit general-purpose bus interface
• High-speed DMAC (supports 1-, 2-, 4-, 8-, 12-, and 16-word burst)
• JTAG boundary scan test function (IEEE1149.1)
• CMOS technology
• +5 V single power source
Remark In this document, an active low pin is indicated by ×××_B (_B after a pin name).
The information in this document is subject to change without notice.
Document No. S12100EJ3V0DS00 (3rd edition)
Date Published February 1999 N CP(K)
Printed in Japan
The mark shows major revised points.
©
1997

1 Page





UPD98401A pdf, ピン配列
PIN CONFIGURATION
PHY
interface
Bus
interface
µPD98401A
Rx7-Rx0
RCLK
RENBL_B
RSOC
EMPTY_B/RxCLAV
Tx7-Tx0
TCLK
TENBL_B
TSOC
FULL_B/TxCLAV
PHRW_B
PHOE_B
PHCE_B
PHINT_B
CD31-CD0
CPAR3-CPAR0
CA17-CAD
CWE_B
COE_B
CBE_B3-CBE_B0
INITD
DBVC
DBMD
DBML
DBMF
DBMR
AD31-AD0
PAR3-PAR0
OE_B
SIZE2-SIZE0
DR/W_B
ATTN_B
GNT_B
RDY_B
ABRT_B
ERR_B
Master
JDO
JDI
JCK
JMS
JRST_B
TRF_B
SR/W_B
SEL_B
ASEL_B
CLK
RST_B
INTR_B
Slave
VDD
GND
Control memory
interface
Bus monitoring
JTAG boundary
scan interface
Test pin
(fixed to low level)
VDD
Power supply
Data Sheet S12100EJ3V0DS00
3


3Pages


UPD98401A 電子部品, 半導体
CONTENTS
µPD98401A
1. PIN FUNCTION ..................................................................................................................................... 7
1.1 PHY Device Interface Pin ............................................................................................................. 7
1.2 Bus Interface Pins ........................................................................................................................ 9
1.3 Bus Monitor Pins ........................................................................................................................ 12
1.4 Control Memory Interface Pins.................................................................................................. 13
1.5 JTAG Boundary Scan Pins ........................................................................................................ 14
1.6 Test Pin........................................................................................................................................ 14
1.7 Power Supply and Ground Pins................................................................................................ 14
1.8 Pin Status During and After Reset ............................................................................................ 15
2. DIFFERENCES FROM µPD98401.................................................................................................... 16
2.1 Additional Functions.................................................................................................................. 16
2.2 Differences from µPD98401 (NEASCOT-S10TM)........................................................................ 16
3. ELECTRICAL SPECIFICATIONS ...................................................................................................... 17
4. PACKAGE DRAWINGS ...................................................................................................................... 33
5. RECOMMENDED SOLDERING CONDITIONS.................................................................................. 34
6 Data Sheet S12100EJ3V0DS00

6 Page



ページ 合計 : 30 ページ
 
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共有リンク

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部品番号部品説明メーカ
UPD98401A

ATM SAR CHIP

NEC
NEC
UPD98401AGD-MML

ATM SAR CHIP

NEC
NEC


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