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Número de pieza | UPD75P048GC-AB8 | |
Descripción | 4-BIT SINGLE-CHIP MICROCOMPUTER | |
Fabricantes | NEC | |
Logotipo | ||
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No Preview Available ! DATA SHEET
MOS INTEGRATED CIRCUIT
µPD75P048
4-BIT SINGLE-CHIP MICROCOMPUTER
DESCRIPTION
The µPD75P048 is a One-Time PROM version of the µPD75048. The µPD75P048 is suitable for small-scale
production or experimental production in system development.
Detailed functions are described in the following user’s manual. Read this manual when designing your
system.
µPD75048 User’s Manual: IEU-1278
FEATURES
• The µPD75048 compatible
• The µPD75P048 for evaluation/pre-production, while the µPD75048 for mass-production
• 8064 × 8 bits of one-time programmable ROM
• 512 × 4 bits of RAM
• 1024 × 4 bits of EEPROM (Data memory area)
• Ports 0 to 3 and 6 to 8 with software-selectable pull-up resistors
• Port 9 with software-selectable pull-down resistors
• 12 N-channel open drain input/output ports (ports 4, 5, and 10)
• Low-voltage operation possible (VDD = 2.7 to 6.0 V)
ORDERING INFORMATION
Part number
µPD75P048CW
µPD75P048GC-AB8
Package
64-pin plastic shrink DIP (750 mil)
64-pin plastic QFP ( 14 mm)
Quality grade
Standard
Standard
Caution Pull-up/pull-down resistor mask options are not available.
Please refer to "Quality grade on NEC Semiconductor Devices" (Document number IEI-1209) published by
NEC Corporation to know the specification of quality grade on the devices and its recommended applications.
Document No. IC-3239
(O.D. No. IC-8720)
Date Published August 1994 P
Printed in Japan
The information in this document is subject to change without notice.
The mark 5 shows major revised points.
©
1994
1 page CONTENTS
µPD75P048
1. PIN FUNCTIONS ························································································································· 6
1.1 PORT PINS ·········································································································································· 6
1.2 NON-PORT PINS ································································································································· 8
1.3 PIN INPUT/OUTPUT CIRCUITS ········································································································ 10
2. DIFFERENCES BETWEEN THE µPD75P048 AND THE µPD75048 ······································· 13
3. PROM (PROGRAM MEMORY) WRITE AND VERIFY ····························································· 14
3.1 PROM WRITE AND VERIFY OPERATION MODE ·········································································· 14
3.2 PROM WRITE PROCEDURE ·············································································································· 15
3.3 PROM READ PROCEDURE ················································································································ 16
4. SCREENING OF ONE-TIME PROM MODEL ··········································································· 17
5. ELECTRICAL SPECIFICATIONS ·································································································· 18
6. PERFORMANCE CURVE (REFERENCE VALUE) ····································································· 32
7. PACKAGE DRAWINGS ··············································································································· 34
8. RECOMMENDED SOLDERING CONDITIONS ········································································· 36
APPENDIX A. DEVELOPMENT TOOLS ·························································································· 37
APPENDIX B. RELATED DOCUMENTS ·························································································· 38
5
5
5
5
5
5
5
5 Page Type F-A
Data
Output
disable
P.U.R.
enable
Type D
VDD
P.U.R.
P-ch
IN/OUT
Type B
Type M-C
Data
Output
disable
P.U.R.
enable
µPD75P048
(2/3)
VDD
P.U.R.
P-ch
IN/OUT
N-ch
Type F-B
P.U.R.: Pull-Up Resistor
Type Y
P.U.R.: Pull-Up Resistor
Output
disable
(P)
Data
Output
disable
Output
disable
(N)
P.U.R.
enable
VDD
VDD
P-ch
N-ch
P.U.R.
P-ch
IN
AVDD
P-ch
N-ch
Sampl-
ing C
AVDD
+
–
IN/OUT
AVSS
Input
enable
AVSS
Reference voltage
(from voltage tap of
series resistor string)
Type M-A
Data
Output
disable
P.U.R.: Pull-Up Resistor
Type Y-A
IN/OUT
N-ch
(Can with-
stand + 10 V)
IN
AVDD
P-ch
N-ch
Middle-voltage input buffer
(Can withstand + 10 V)
P.U.R.: Pull-Up Resistor
AVSS
IN instruction
Input buffer
Sampl-
ing C
AVDD
+
–
AVSS
Reference voltage
(from voltage tap of
series resistor string)
11
11 Page |
Páginas | Total 40 Páginas | |
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