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UPD75106 の電気的特性と機能

UPD75106のメーカーはNECです、この部品の機能は「4-BIT SINGLE-CHIP MICROCOMPUTER」です。


製品の詳細 ( Datasheet PDF )

部品番号 UPD75106
部品説明 4-BIT SINGLE-CHIP MICROCOMPUTER
メーカ NEC
ロゴ NEC ロゴ 




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UPD75106 Datasheet, UPD75106 PDF,ピン配置, 機能
DATA SHEET
MOS INTEGRATED CIRCUIT
µPD75104, 75106, 75108
4-BIT SINGLE-CHIP MICROCOMPUTER
DESCRIPTION
µPD75108 is a 4-bit single-chip microcomputer integrating timer/event counters, serial interface, and vector
interrupt function, in addition to a CPU, ROM, RAM, and I/O ports, on a single chip. Operating at high speeds,
the microcomputer allows data to be manipulated in units of 1, 4, or 8 bits. In addition, various bit manipulation
instructions are provided to reinforce I/O manipulation capability. Equipped with I/Os for interfacing with
peripheral circuits operating on a different supply voltage, outputs that can directly drive LEDs, and analog
inputs, µPD75108 is suitable for controlling such systems as VTRs, acoustic products, button telephones, radio
communications equipment, and printers. A pin-compatible EPROM model is also available for evaluation of
system development and small-scale production of application systems.
Detailed functions are described in the following user’s manual. Be sure to read it for designing.
µPD751XX Series User’s Manual: IEM-922
FEATURES
Internal memory
• Program memory (ROM)
: 8068 × 8 bits (µPD75108)
: 6016 × 8 bits (µPD75106)
: 4096 × 8 bits (µPD75104)
• Data memory (RAM)
: 512 × 4 bits (µPD75108)
: 320 × 4 bits (µPD75106, 75104)
New architecture “75X series” rivaling 8-bit microcomputers
43 systematically organized instructions
• A wealth of bit manipulation instructions
• 8-bit data transfer, compare, operation, increment, and decrement instructions
• 1-byte relative branch instructions
• GETI instruction executing 2-/3-byte instruction with one byte
High speed. Minimum instruction execution time: 0.95 µs (at 4.19 MHz), 5 V
Power-saving, instruction time change function: 0.95 µs/1.91 µs/15.3 µs (at 4.19 MHz)
I/O port pins as many as 58
Three channels of 8-bit timers
8-bit serial interface
Multiplexed vector interrupt function
Model with PROM is available: µPD75P108B (One-time PROM, EPROM)
Unless there are differences among µPD75104, 75106, and 75108 functions, µPD75108 is treated as the
representative model throughout this manual.
The information in this document is subject to change without notice.
Document No. IC-2520B
(O. D. No. IC-6906B)
Date Published January 1994 P
Printed in Japan
The mark 5 shows major revised points.
© NEC Corporation 1989

1 Page





UPD75106 pdf, ピン配列
µPD75104, 75106, 75108
FUNCTIONAL OUTLINE
Item
Number of Basic Instructions
Minimum Instruction
Execution Time
Internal Memory
ROM
RAM
General-Purpose Register
Accumulator
I/O Port
Timer/Counter
Serial Interface
Vector Interrupt
Test Input
Standby
Instruction Set
Others
Package
Specifications
43
Changeable in three steps: 0.95 µs, 1.91 µs, and 15.3 µs at 4.19 MHz
8064 × 8 bits (µPD75108), 6016 × 8 bits (µPD75106), 4096 × 8 bits (µPD75104)
512 × 4 bits (µPD75108), 320 × 4 bits (µPD75106, 75104)
4 bits × 8 × 4 banks (memory mapped)
Three accumulators selectable according to the bit length of manipulated data:
• 1-bit accumulator (CY), 4-bit accumulator (A), and 8-bit accumulator (XA)
58 port pins
• CMOS input pins: 10
• CMOS I/O pins (can directly drive LEDs): 32
• Medium voltage N-ch open-drain I/O pins: 12
(can directly drive LEDs. Pull-up resistor can be connected to each bit)
• Comparator input pins (4-bit accuracy): 4
• 8-bit timer/event counter × 2
• 8-bit basic interval timer (can be used as watchdog timer)
• 8 bits
• LSB first/MSB first mode selectable
• Two transfer modes (transfer/reception and reception only modes)
External: 3, Internal: 4
External: 2
• STOP and HALT modes
• Various bit manipulation instructions (set, reset, test, Boolean operation)
• 8-bit data transfer, compare, operation, increment, and decrement
• 1-byte relative branch instructions
• GETI instruction constituting 2 or 3-byte instruction with 1 byte
• Power-ON reset circuit (mask option)
• Bit manipulation memory (bit sequential buffer: 16 bits)
• 64-pin plastic shrink DIP (750 mil)
• 64-pin plastic QFP (14 × 20 mm)
3


3Pages


UPD75106 電子部品, 半導体
µPD75104, 75106, 75108
1. PIN CONFIGURATION (Top View)
• 64-Pin Plastic Shrink DIP (750 mil)
P13/INT3
P12/INT2
P11/INT1
P10/INT0
PTH03
PTH02
PTH01
PTH00
TI0
TI1
P23
P22/PCL
P21 PTO1
P20 PTO0
P03/SI
P02/SO
P01/SCK
P00/INT4
P123
P122
P121
P120
P133
P132
P131
P130
P143
P142
P141
P140
NC
V DD
• 64-Pin Plastic QFP (14 × 20 mm)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
64 V SS
63 P90
62 P91
61 P92
60 P93
59 P80
58 P81
57 P82
56 P83
55 P70
54 P71
53 P72
52 P73
51 P60
50 P61
49 P62
48 P63
47 X1
46 X2
45 RESET
44 P50
43 P51
42 P52
41 P53
40 P40
39 P41
38 P42
37 P43
36 P30
35 P31
34 P32
33 P33
P41
P40
P53
P52
P51
P50
RESET
X2
X1
P63
P62
P61
P60
P73
P72
P71
P70
P83
P82
1 64 63 62 61 60 59 58 57 56 55 54 53 52 51
2 50
3 49
4 48
5 47
6 46
7 45
8 44
9 43
10 42
11 41
12 40
13 39
14 38
15 37
16 36
17 35
18 34
19 20 21 22 23 24 25 26 27 28 29 30 31 32 33
P131
P132
P133
P120
P121
P122
P123
P00/INT4
P01/SCK
P02/SO
P03/SI
P20/PTO0
P21/PTO1
P22/PCL
P23
TI1
TI0
PTH00
PTH01
6

6 Page



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共有リンク

Link :


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