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UPD72870AGM-8ED の電気的特性と機能

UPD72870AGM-8EDのメーカーはNECです、この部品の機能は「IEEE1394 1-CHIP OHCI HOST CONTROLLER」です。


製品の詳細 ( Datasheet PDF )

部品番号 UPD72870AGM-8ED
部品説明 IEEE1394 1-CHIP OHCI HOST CONTROLLER
メーカ NEC
ロゴ NEC ロゴ 




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UPD72870AGM-8ED Datasheet, UPD72870AGM-8ED PDF,ピン配置, 機能
PRELIMINARY DATA SHEET
MOS INTEGRATED CIRCUIT
µPD72870A
IEEE1394 1-CHIP OHCI HOST CONTROLLER
The µPD72870A is the LSI which integrated OHCI-Link and PHY function into a single chip.
The µPD72870A complies with the P1394a draft 2.0 specifications and the OpenHCI IEEE1394 1.0, and works up
to 400 Mbps.
It makes design so compact for PC and PC card application.
FEATURES
• Compliant with Link Layer Services as defined in 1394 Open Host Controller Interface specification release 1.0
• Compliant with Physical Layer Services as defined in P1394a draft 2.0 (Data Rate 100/200/400 Mbps)
• Numbers of supported port (1, 2, 3 ports) are selectable
• Compliant with protocol enhancement as defined in P1394a draft 2.0
• Modular 32-bit host interface compliant to PCI Specification release 2.1
• Support PCI-Bus Power Management Interface Specification release 1.0
• Modular 32-bit host interface compliant to Card Bus Specification
• Cycle Master and Isochronous Resource Manager capable
• Built-in FIFOs for isochronous transmit (1024 bytes), asynchronous transmit (1024 bytes), and receive (2048
bytes)
• 32-bit CRC generation and checking for receive/transmit packets
• 4 isochronous transmit DMAs and 4 isochronous receive DMAs supported
• 32-bit DMA channels for physical memory read/write
• Clock generation by 24.576 MHz X’tal
• Internal control and operational registers direct-mapped to PCI configuration space
• 2-wire Serial EEPROMTM interface supported
• Separate power supply Link and PHY
• Programmable latency timer from serial EEPROM in Cardbus mode (CARD_ON = 1)
ORDERING INFORMATION
Part number
µPD72870AGM-8ED
µPD72870AF1-FA2
Package
160-pin plastic LQFP (Fine pitch) (24 x 24)
192-pin plastic FBGA (14 x 14)
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. S14653EJ1V0DS00 (1st edition)
Date Published January 2000 NS CP (K)
Printed in Japan
2000

1 Page





UPD72870AGM-8ED pdf, ピン配列
BLOCK DIAGRAMS
Top Block Diagram
Serial ROM Interface
µPD72870A
PCI Bus/
Cardbus
Link
PHY
Cable
Interface
PHY Signal
Preliminary Data Sheet S14653EJ1V0DS00
3


3Pages


UPD72870AGM-8ED 電子部品, 半導体
PIN CONFIGURATION
• 160-pin plastic LQFP (Fine pitch) (24 x 24)
µPD72870AGM-8ED
Top View
L_VDD
CLKRUN
PME
INTA
PRST
PCLK
GNT
REQ
DGND
PCI_VDD
AD31
AD30
AD29
AD28
DGND
AD27
AD26
AD25
AD24
L_VDD
DGND
CBE3
IDSEL
AD23
AD22
AD21
AD20
DGND
AD19
AD18
PCI_VDD
AD17
AD16
DGND
CBE2
FRAME
IRDY
TRDY
DEVSEL
L_VDD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
µPD72870A
120 P_AVDD
119 AGND
118 XO
117 XI
116 P_AVDD
115 FIL0
114 FIL1
113 AGND
112 AGND
111 P_AVDD
110 P_RESETB
109 DGND
108 P_DVDD
107 P_AVDD
106 SUS_RESM
105 PORTDIS
104 DGND
103 P_DVDD
102 IC(L)
101 IC(L)
100 IC(H)
99 IC(H)
98 DGND
97 P_DVDD
96 CMC
95 PC2
94 PC1
93 PC0
92 IC(N)
91 IC(L)
90 DGND
89 IC(L)
88 IC(N)
87 IC(N)
86 IC(N)
85 DGND
84 IC(N)
83 IC(N)
82 IC(N)
81 L_VDD
6 Preliminary Data Sheet S14653EJ1V0DS00

6 Page



ページ 合計 : 30 ページ
 
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共有リンク

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部品番号部品説明メーカ
UPD72870AGM-8ED

IEEE1394 1-CHIP OHCI HOST CONTROLLER

NEC
NEC


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