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UPD70F3033AY の電気的特性と機能

UPD70F3033AYのメーカーはNECです、この部品の機能は「V850/SB1TM 32-/16-BIT SINGLE-CHIP MICROCONTROLLERS」です。


製品の詳細 ( Datasheet PDF )

部品番号 UPD70F3033AY
部品説明 V850/SB1TM 32-/16-BIT SINGLE-CHIP MICROCONTROLLERS
メーカ NEC
ロゴ NEC ロゴ 




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UPD70F3033AY Datasheet, UPD70F3033AY PDF,ピン配置, 機能
DATA SHEET
MOS INTEGRATED CIRCUIT
µPD703031A, 703031AY, 703033A,
703033AY, 70F3033A, 70F3033AY
V850/SB1TM
32-/16-BIT SINGLE-CHIP MICROCONTROLLERS
DESCRIPTION
The µPD703031A, 703031AY, 703033A, 703033AY, 70F3033A, and 70F3033AY (V850/SB1) are 32-/16-bit
single-chip microcontrollers of the V850 FamilyTM for AV equipment. 32-bit CPU, ROM, RAM, timer/counters, serial
interfaces, A/D converter, DMA controller, and so on are integrated on a single chip.
The µPD70F3033A and 70F3033AY have flash memory in place of the internal mask ROM of the µPD703033A
and 703033AY. Because flash memory allows the program to be written and erased electrically with the device
mounted on the board, these products are ideal for the evaluation stages of system development, small-scale
production, and rapid development of new products.
Detailed function descriptions are provided in the following user’s manuals. Be sure to read them before
designing.
V850/SB1, V850/SB2TM User’s Manual Hardware: U13850E
V850 Family User’s Manual Architecture:
U10243E
FEATURES
{ Number of instructions: 74
{ Minimum instruction execution time: 50 ns (@ internal 20 MHz operation)
{ General-purpose registers: 32 bits × 32 registers
{ Instruction set: Signed multiplication, saturation operations, 32-bit shift instructions, bit manipulation instructions,
load/store instructions
{ Memory space: 16 MB linear address space
{ Internal memory ROM: 128 KB (µPD703031A, 703031AY: mask ROM)
256 KB (µPD703033A, 703033AY: mask ROM)
256 KB (µPD70F3033A, 70F3033AY: flash memory)
RAM: 12 KB (µPD703031A, 703031AY)
16 KB (µPD703033A, 703033AY, 70F3033A, 70F3033AY)
{ Interrupt/exception: µPD703031A, 703033A, 70F3033A (external: 8, internal: 30 sources, exception: 1 source)
µPD703031AY, 703033AY, 70F3033AY (external: 8, internal: 31 sources, exception: 1 source)
{ I/O lines Total: 83
{ Timer/counters: 16-bit timer (2 channels: TM0, TM1)
8-bit timer (6 channels: TM2 to TM7)
{ Watch timer: 1 channel
{ Watchdog timer: 1 channel
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. U14734EJ1V0DS00 (1st edition)
Date Published April 2000 N CP(K)
Printed in Japan
©
2000

1 Page





UPD70F3033AY pdf, ピン配列
µPD703031A, 703031AY, 703033A, 703033AY, 70F3033A, 70F3033AY
PIN CONFIGURATION (Top View)
100-pin plastic LQFP (fine pitch) (14 × 14)
µPD703031AGC-×××-8EU
µPD703031AYGC-×××-8EU
µPD703033AGC-×××-8EU
µPD703033AYGC-×××-8EU
µPD70F3033AGC-8EU
µPD70F3033AYGC-8EU
P21/SO2
P22/SCK2/SCL1Note 2
P23/RXD1/SI3
P24/TXD1/SO3
P25/ASCK1/SCK3
EVDD
EVSS
P26/TI2/TO2
P27/TI3/TO3
P30/TI00
P31/TI01
P32/TI10/SI4
P33/TI11/SO4
P34/TO0/A13/SCK4
P35/TO1/A14
P36/TI4/TO4/A15
P37/TI5/TO5
IC/VPPNote 1
P100/RTP0/KR0/A5
P101/RTP1/KR1/A6
P102/RTP2/KR2/A7
P103/RTP3/KR3/A8
P104/RTP4/KR4/A9
P105/RTP5/KR5/A10
P106/RTP6/KR6/A11
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
75 P71/ANI1
74 P70/ANI0
73 AVREF
72 AVSS
71 AVDD
70 P65/A21
69 P64/A20
68 P63/A19
67 P62/A18
66 P61/A17
65 P60/A16
64 P57/AD15
63 P56/AD14
62 P55/AD13
61 P54/AD12
60 P53/AD11
59 P52/AD10
58 P51/AD9
57 P50/AD8
56 BVSS
55 BVDD
54 P47/AD7
53 P46/AD6
52 P45/AD5
51 P44/AD4
Notes 1.
2.
IC: Connect directly to VSS (µPD703031A, 703031AY, 703033A, 703033AY).
VPP: Connect to VSS in normal operation mode (µPD70F3033A, 70F3033AY).
SCL0, SCL1, SDA0, and SDA1 are available only in the µPD703031AY, 703033AY,
and 70F3033AY.
Data Sheet U14734EJ1V0DS00
3


3Pages


UPD70F3033AY 電子部品, 半導体
µPD703031A, 703031AY, 703033A, 703033AY, 70F3033A, 70F3033AY
INTERNAL BLOCK DIAGRAM
NMI
INTP0 to INTP6
TI00, TI01,
TI10, TI11
TO0, TO1
TI2/TO2
TI3/TO3
TI4/TO4
TI5/TO5
SO0
SI0/SDA0Note 3
SCK0/SCL0Note 3
SO2
SI2/SDA1Note 3
SCK2/SCL1Note 3
SO1/TXD0
SI1/RXD0
SCK1/ASCK0
SO3/TXD1
SI3/RXD1
SCK3/ASCK1
SO4
SI4
SCK4
KR0 to KR7
INTC
Timer/counters
16-bit timer
: TM0, TM1
8-bit timer
: TM2 to TM7
SIO
CSI0/I2C0Note 3
CSI2/I2C1Note 3
CSI1/UART0
CSI3/UART1
Variable length
CSI4
Key return
function
DMAC: 6ch
Watch timer
Watchdog timer
ROM
Note 1
RAM
Note 2
CPU
ROM
PC correction
32-bit barrel
shifter
System
registers
General registers
32 bits × 32
Multiplier
16 × 16 32
ALU
Instruction
queue
BCU
HLDRQ (P96)
HLDAK (P95)
ASTB (P94)
DSTB/RD (P93)
R/W/WRH (P92)
UBEN (P91)
LBEN/WRL (P90)
WAIT (P110)
A1 to A12
(P100 to P107, P110 to P113)
A13 to A15 (P34 to P36)
A16 to A21 (P60 to P65)
AD0 to AD15
(P40 to P47, P50 to P57)
Ports
RTP
A/D
converter
CG
CLKOUT
X1
X2
XT1
XT2
RESET
3.3 V
Regulator
VDD
VSS
BVDD
BVSS
EVDD
EVSS
VPPNote 4
ICNote 5
Notes 1.
2.
3.
4.
5.
µPD703031A, 703031AY: 128 KB (mask ROM)
µPD703033A, 703033AY: 256 KB (mask ROM)
µPD70F3033A, 70F3033AY: 256 KB (flash memory)
µPD703031A, 703031AY:
12 KB
µPD703033A, 703033AY, 70F3033A, 70F3033AY: 16 KB
I2C bus interface and SDAn and SCLn pins are available only in the µPD703031AY, 703033AY,
and 70F3033AY.
µPD70F3033A, 70F3033AY
µPD703031A, 703031AY, 703033A, 703033AY
6 Data Sheet U14734EJ1V0DS00

6 Page



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共有リンク

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部品番号部品説明メーカ
UPD70F3033A

V850/SB1TM 32-/16-BIT SINGLE-CHIP MICROCONTROLLERS

NEC
NEC
UPD70F3033AY

V850/SB1TM 32-/16-BIT SINGLE-CHIP MICROCONTROLLERS

NEC
NEC


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