|
|
IRF640SのメーカーはSTMicroelectronicsです、この部品の機能は「N - CHANNEL 200V - 0.150ohm - 18A TO-263 MESH OVERLAY] MOSFET」です。 |
部品番号 | IRF640S |
| |
部品説明 | N - CHANNEL 200V - 0.150ohm - 18A TO-263 MESH OVERLAY] MOSFET | ||
メーカ | STMicroelectronics | ||
ロゴ | |||
このページの下部にプレビューとIRF640Sダウンロード(pdfファイル)リンクがあります。 Total 8 pages
® IRF640S
N - CHANNEL 200V - 0.150Ω - 18A TO-263
MESH OVERLAY™ MOSFET
TYPE
VDSS
RDS(on)
ID
IRF640S
200 V < 0.18 Ω 18 A
s TYPICAL RDS(on) = 0.150 Ω
s EXTREMELY HIGH dv/dt CAPABILITY
s VERY LOW INTRINSIC CAPACITANCES
s GATE CHARGE MINIMIZED
DESCRIPTION
This power MOSFET is designed using he
company’s consolidated strip layout-based MESH
OVERLAY™ process. This technology matches
and improves the performances compared with
standard parts from various sources.
3
1
D2PAK
TO-263
(suffix ”T4”)
APPLICATIONS
s HIGH CURRENT SWITCHING
s UNINTERRUPTIBLE POWER SUPPLY (UPS)
s DC/DC COVERTERS FOR TELECOM,
INDUSTRIAL, AND LIGHTING EQUIPMENT.
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Sy mb o l
P a ramet er
V DS
V DGR
Drain-source Voltage (VGS = 0)
Drain- gate Voltage (RGS = 20 kΩ)
VGS
ID
ID
IDM (•)
Ptot
G ate-source Voltage
Drain Current (continuous) at Tc = 25 oC
Drain Current (continuous) at Tc = 100 oC
Drain Current (pulsed)
T otal Dissipat ion at Tc = 25 oC
Derating Factor
dv/dt(1) Peak Diode Recovery voltage slope
Tstg Storage Temperature
Tj Max. Operating Junction Temperature
(•) Pulse width limited by safe operating area
Va l u e
Un it
200 V
200 V
± 20
V
18 A
11 A
72 A
125 W
1.0 W /o C
5
-65 to 150
150
( 1) ISD ≤ 18A, di/dt ≤ 300 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX
V/ns
oC
oC
September 1999
1/8
1 Page IRF640S
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbo l
td(on)
tr
P ar am et e r
Turn-on Time
Rise Time
Qg Total Gate Charge
Q gs Gat e-Source Charge
Qgd Gat e-Drain Charge
Test Conditions
VDD = 100 V ID = 9 A
RG = 4.7 Ω
VGS = 10 V
(see test circuit, figure 3)
VDD = 160 V ID = 18 A VGS = 10V
Min.
Typ.
13
27
55
10
21
Max.
17
35
72
Unit
ns
ns
nC
nC
nC
SWITCHING OFF
Symbo l
tr (Voff)
tf
tc
P ar am et e r
Off-voltage Rise T ime
Fall Time
Cross-over Time
Test Conditions
VDD = 160 V ID = 18 A
RG = 4.7 Ω VGS = 10 V
(see test circuit, figure 5)
Min.
Typ.
21
25
50
Max.
27
32
65
Unit
ns
ns
ns
SOURCE DRAIN DIODE
Symbo l
P ar am et e r
Test Conditions
ISD
ISDM (•)
Source-drain Current
Source-drain Current
( pu ls ed)
VSD (∗) Forward On Voltage
ISD = 18 A VGS = 0
trr Reverse Recovery
Time
Qrr Reverse Recovery
Charge
ISD = 18 A di/dt = 100 A/µs
VDD = 50 V Tj = 150 oC
(see test circuit, figure 5)
I R RM
Reverse Recovery
Current
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
Min.
Typ.
Max.
18
72
Unit
A
A
1.5
240
1.8
15
V
ns
µC
A
Safe Operating Area
Thermal Impedance
3/8
3Pages IRF640S
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 1: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For
Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
6/8
6 Page | |||
ページ | 合計 : 8 ページ | ||
|
PDF ダウンロード | [ IRF640S データシート.PDF ] |
データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
部品番号 | 部品説明 | メーカ |
IRF640 | N-channel TrenchMOS transistor | NXP Semiconductors |
IRF640 | N-CHANNEL 200V, 18A, MOSFET ( TO-220/TO-220FP ) | STMicroelectronics |
IRF640 | Power MOSFET(Vdss=200V/ Rds(on)=0.18ohm/ Id=18A) | International Rectifier |
IRF640 | 200V N-Channel MOSFET | Fairchild Semiconductor |