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IR2110E6 PDF Datasheet ( 特性, スペック, ピン接続図 )

部品番号 IR2110E6
部品説明 HIGH AND LOW SIDE DRIVER
メーカ International Rectifier
ロゴ International Rectifier ロゴ 



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IR2110E6 Datasheet, IR2110E6 PDF,ピン配置, 機能
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Data Sheet No. PD-6.065
IR2110E6
HIGH AND LOW SIDE DRIVER
Features
Product Summary
n Floating channel designed for bootstrap operation
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
n Gate drive supply range from 10 to 20V
n Undervoltage lockout for both channels
n Separate logic supply range from 5 to 20V
Logic and power ground ±5V offset
n CMOS Schmitt-triggered inputs with pull-down
n Cycle by cycle edge-triggered shutdown logic
n Matched propagation delay for both channels
n Outputs in phase with inputs
Absolute Maximum Ratings
VOFFSET
600V max.
IO+/-
2A / 2A
VOUT
10 - 20V
ton/off (typ.)
120 & 94 ns
Delay Matching
10 ns
Description
The IR2110E6 is a high voltage, high speed
power MOSFET and IGBT driver with independent
high and low side referenced output channels. Pro-
prietary HVIC and latch immune CMOS technolo-
gies enable ruggedized monolithic construction.
Logic inputs are compatible with standard CMOS or
LSTTL outputs. The output drivers feature a high
pulse current buffer stage designed for minimum
driver cross-conduction. Propagation delays are
matched to simplify use in high frequency applica-
tions. The floating channel can be used to drive an
N-channel power MOSFET or IGBT in the high side
configuration which operates up to 600 volts.
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute
voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air
conditions.Additional information is shown in Figures 28 through 35.
Symbol
Parameter
Min.
Max.
Units
VB
VS
VHO
VCC
VLO
VDD
VSS
VIN
dVS/dt
PD
RthJA
Tj
TS
TL
High Side Floating Supply Absolute Voltage
High Side Floating Supply Offset Voltage
High Side Output Voltage
Low Side Fixed Supply Voltage
Low Side Output Voltage
Logic Supply Voltage
Logic Supply Offset Voltage
Logic Input Voltage (HIN, LIN & SD)
Allowable Offset Supply Voltage Transient (Fig. 16)
Package Power Dissipation @ TA = 25°C (Fig. 19)
Thermal Resistance, Junction to Ambient
Junction Temperature
Storage Temperature
Package Mounting Surface Temperature
Weight
To Order
-0.5 VS + 20
— 600
VS -0.5
-0.5
VB + 0.5
20
-0.5
-0.5
VCC - 20
VSS - 0.5
VCC + 0.5
VSS + 20
VCC + 0.5
VDD + 0.5
50
— 1.6
— 75
-55 125
-55 150
300 (for 5 seconds)
0.45 (typical)
V
V/ns
W
°C/W
°C
g

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