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PDF SG3525A Data sheet ( Hoja de datos )
| Número de pieza | SG3525A | |
| Descripción | PULSE WIDTH MODULATOR CONTROL CIRCUITS | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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SG3525A
Pulse Width Modulator
Control Circuit
The SG3525A pulse width modulator control circuit offers
improved performance and lower external parts count when
implemented for controlling all types of switching power supplies.
The on−chip +5.1 V reference is trimmed to "1% and the error
amplifier has an input common−mode voltage range that includes the
reference voltage, thus eliminating the need for external divider
resistors. A sync input to the oscillator enables multiple units to be
slaved or a single unit to be synchronized to an external system clock.
A wide range of deadtime can be programmed by a single resistor
connected between the CT and Discharge pins. This device also
features built−in soft−start circuitry, requiring only an external timing
capacitor. A shutdown pin controls both the soft−start circuitry and the
output stages, providing instantaneous turn off through the PWM latch
with pulsed shutdown, as well as soft−start recycle with longer
shutdown commands. The under voltage lockout inhibits the outputs
and the changing of the soft−start capacitor when VCC is below
nominal. The output stages are totem−pole design capable of sinking
and sourcing in excess of 200 mA. The output stage of the SG3525A
features NOR logic resulting in a low output for an off−state.
Features
• 8.0 V to 35 V Operation
• 5.1 V " 1.0% Trimmed Reference
• 100 Hz to 400 kHz Oscillator Range
• Separate Oscillator Sync Pin
• Adjustable Deadtime Control
• Input Undervoltage Lockout
• Latching PWM to Prevent Multiple Pulses
• Pulse−by−Pulse Shutdown
• Dual Source/Sink Outputs: "400 mA Peak
• Pb−Free Packages are Available*
www.DataSheet4U.com
16
1
http://onsemi.com
MARKING
DIAGRAMS
16
PDIP−16
N SUFFIX
CASE 648
SG3525AN
AWLYYWW
1
16
16
SOIC−16L
DW SUFFIX
CASE 751G
SG3525A
AWLYYWW
1
1
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
PIN CONNECTIONS
Inv. Input 1
Noninv. Input 2
Sync 3
OSC. Output 4
CT 5
RT 6
Discharge 7
Soft−Start 8
16 Vref
15 VCC
14 Output B
13 VC
12 Ground
11 Output A
10 Shutdown
9 Compensation
(Top View)
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2005
January, 2005 − Rev. 5
1
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Publication Order Number:
SG3525A/D
1 page  
SG3525A
ELECTRICAL CHARACTERISTICS (continued)
Characteristics
SOFT−START SECTION
Soft−Start Current (Vshutdown = 0 V)
Soft−Start Voltage (Vshutdown = 2.0 V)
Shutdown Input Current (Vshutdown = 2.5 V)
OUTPUT DRIVERS (Each Output, VCC = +20 V)
Output Low Level
(Isink = 20 mA)
(Isink = 100 mA)
Output High Level
(Isource = 20 mA)
(Isource = 100 mA)
Under Voltage Lockout (V8 and V9 = High)
Collector Leakage, VC = +35 V (Note 6)
Rise Time (CL = 1.0 nF, TJ = 25°C)
Fall Time (CL = 1.0 nF, TJ = 25°C)
Shutdown Delay (VDS = +3.0 V, CS = 0, TJ = +25°C)
Supply Current (VCC = +35 V)
6. Applies to SG3525A only, due to polarity of output pulses.
Symbol Min Typ Max Unit
25 50 80 mA
− 0.4 0.6 V
− 0.4 1.0 mA
VOL V
− 0.2 0.4
− 1.0 2.0
VOH
18 19
17 18
−
−
V
VUL
6.0 7.0 8.0
V
IC(leak)
−
− 200 mA
tr
−
100 600
ns
tf − 50 300 ns
tds
−
0.2 0.5
ms
ICC − 14 20 mA
Vref
3.0k
PWM
ADJ.
1.0k
1.5k
0.009
Clock
16
0.1
4
Sync
3
RT
Deadtime
Ramp
100W
6
7
5
0.1 0.001
Comp
−
V/I Meter
+
1 = VIO
2 = 1(+)
3 = 1(−)
1
2
3
10k
0.01
1
2
3
11
22
33
9
1
2
O
s
c
i
l
l
a
t
o
r
−
E/A
+
Reference Regulator
Flip/
Flop
A
B
PWM
50mA
5.0k
DUT
Figure 2. Lab Test Fixture
15
0.1
13
0.1
VCC
VC
Out A
11
1.0k, 1.0W
(2)
14
Out B
12 GND
8 Softstart
+
5.0mF
5.0k 10
Vref
2.0k
Shutdown
http://onsemi.com
5
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet SG3525A.PDF ] | |
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