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SL4051BDのメーカーはSystem Logic Semiconductorです、この部品の機能は「Analog Multiplexer Demultiplexer」です。 |
部品番号 | SL4051BD |
| |
部品説明 | Analog Multiplexer Demultiplexer | ||
メーカ | System Logic Semiconductor | ||
ロゴ | |||
このページの下部にプレビューとSL4051BDダウンロード(pdfファイル)リンクがあります。 Total 6 pages
SL4051B
Analog Multiplexer Demultiplexer
High-Performance Silicon-Gate CMOS
The SL4051B analog multiplexer/demultiplexer is digitally controlled
analog switches having low ON impedance and very low OFF leakage
current. Control of analog signals up to 20V peak-to-peak can be
achieved by digital signal amplitudes of 4.5 to 20V (if VCC - GND = 3V, a
VCC - VEE of up to 13 V can be controlled; for VCC - VEE level differences
above 13V a VCC - GND of at least 4.5V is required).
These multiplexer circuits dissipate extremely low quiescent power
over the full VCC -GND and VCC - VEE supply-voltage ranges,
independent of the logic state of the control signals. When a logic
“1”is present at the ENABLE input terminal all channels are off.
The SL4051B is a single 8-channel multiplexer having three binary
control inputs, A,B and C, and an ENABLE input. The three binary
signals select 1 of 8 channels to be turned on, and connect one of the 8
inputs to the output.
• Operating Voltage Range: 3.0 to 18 V
• Maximum input current of 1 µA at 18 V over full package-
temperature range; 100 nA at 18 V and 25°C
• Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
ORDERING INFORMATION
SL4051BN Plastic
SL4051BD SOIC
TA = -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
Single-Pole, 8-Position Plus Common Off
PIN 16 =VCC
PIN 7 = VEE
PIN 8 = GND
SLS
System Logic
Semiconductor
FUNCTION TABLE
Control Inputs
Enable
Select
CBA
L LLL
L LLH
L LH L
L LHH
L HL L
L HLH
L HH L
L HHH
H XXX
X = don’t care
ON
Channels
X0
X1
X2
X3
X4
X5
X6
X7
None
1 Page SL4051B
DC ELECTRICAL CHARACTERISTICS Digital Section
Symbol
Parameter
Test Conditions
VCC Guaranteed Limit
V ≥ -55 ≤ 25 ≤ 125 Unit
°C °C °C
VIH Minimum High-Level VIS=VCC thru 1kΩ
Input Voltage, Channel- VEE=GND
Select or Enable Inputs IIS<2µA on all OFF Chanels
RL=1kΩ to GND
VIL Maximum Low -Level VIS=VCC thru 1kΩ
Input Voltage, Channel- VEE=GND
Select or Enable Inputs IIS<2µA on all OFF Chanels
RL=1kΩ to GND
IIN Maximum Input
Leakage Current,
Channel-Select or
Enable Inputs
VIN=VCC or GND
5 3.5
10 7
15 11
3.5 3.5 V
77
11 11
5 1.5
10 3
15 4
1.5 1.5 V
33
44
18 ±0.1 ±0.1 ±1.0 µA
ICC Maximum Quiescent
Channel Select = VCC or GND
5
5
5 150 µA
Supply Current (per
10 10
10 300
Package)
15 20
20 600
20 100 100 3000
DC ELECTRICAL CHARACTERISTICS Analog Section
VCC
Symbol
Parameter
Test Conditions V
RON Maximum “ON” Resistance VEE=GND=0
VIS = GND to VCC
∆RON
IOFF
Maximum Difference in
“ON” Resistance Between
Any Two Channels in the
Same Package
Maximum Off- Channel
Leakage Current, Any One
Channel
Maximum Off- Channel
Leakage Current, Common
Channel
VEE=GND=0
VEE=GND=0
VEE=GND=0
5
10
15
5
10
15
18
18
Guaranteed Limit
≥ -55
°C
≤ 25 ≤ 125
°C °C
800 1050 1300
310 400 550
200 240 320
- 10 -
- 15 -
- 5-
Unit
Ω
Ω
±100 ±100 ±1000 nA
±100 ±100 ±1000
SLS
System Logic
Semiconductor
3Pages SL4051B
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms
EXPANDED LOGIC DIAGRAM
SLS
System Logic
Semiconductor
6 Page | |||
ページ | 合計 : 6 ページ | ||
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PDF ダウンロード | [ SL4051BD データシート.PDF ] |
データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
部品番号 | 部品説明 | メーカ |
SL4051B | Analog Multiplexer Demultiplexer | System Logic Semiconductor |
SL4051BD | Analog Multiplexer Demultiplexer | System Logic Semiconductor |
SL4051BN | Analog Multiplexer Demultiplexer | System Logic Semiconductor |