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PDF SL4043BN Data sheet ( Hoja de datos )
| Número de pieza | SL4043BN | |
| Descripción | Quad 3-State R/S Latch | |
| Fabricantes | System Logic Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de SL4043BN (archivo pdf) en la parte inferior de esta página. Total 6 Páginas | ||
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SL4043B
Quad 3-State R/S Latch
High-Voltage Silicon-Gate CMOS
The SL4043B types are quad cross-coupled 3-state CMOS NOR
latces. Each latch has a separate Q output and individual SET and
RESET inputs. The Q outputs are controlled by a common ENABLE
input. A logic “1” or high on the ENABLE input connects the latch
states to the Q outputs. A logic “0” or low on the ENABLE input
disconnects the latch states from the Q outputs, resulting in an open
circuit condition on the Q outputs. The open circuit feature allows
common busing of the outputs.
• Operating Voltage Range: 3.0 to 18 V
• Maximum input current of 1 µA at 18 V over full package-
temperature range; 100 nA at 18 V and 25°C
• Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
ORDERING INFORMATION
SL4043BN Plastic
SL4043BD SOIC
TA = -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 13 = NO CONNECTION
PIN 16=VCC
PIN 8= GND
FUNCTION TABLE
Inputs
S R OE
XX L
LL
LH
HL
HH
H
H
H
H
X = don’t care
Outputs
Q
High
Impedance
No change
L
H
H
SLS
System Logic
Semiconductor
1 page  
SL4043B
Figure 3. Switching Waveforms
SLS
System Logic
Semiconductor
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet SL4043BN.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| SL4043B | Quad 3-State R/S Latch | System Logic Semiconductor |
| SL4043BD | Quad 3-State R/S Latch | System Logic Semiconductor |
| SL4043BN | Quad 3-State R/S Latch | System Logic Semiconductor |
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