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Número de pieza | SL4013BN | |
Descripción | Dual D Flip-Flop | |
Fabricantes | System Logic Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de SL4013BN (archivo pdf) en la parte inferior de esta página. Total 5 Páginas | ||
No Preview Available ! SL4013B
Dual D Flip-Flop
High-Voltage Silicon-Gate CMOS
The SL4013B consists of two identical, independent data-type flip-
flops. Each flip-flop has independent data, set, reset, and clock inputs
and Q and Q outputs. These devices can be used for shift register
applications, and, by connecting Q output to the data input, for
counter and toggle applications. The logic level present at the D input
is transferred to the Q output during the positive-going transition of
the clock pulse. Setting or resetting is independent of the clock and is
accomplished by a high level on the set or reset line, respectively.
• Operating Voltage Range: 3.0 to 18 V
• Maximum input current of 1 µA at 18 V over full package-
temperature range; 100 nA at 18 V and 25°C
• Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
LOGIC DIAGRAM
ORDERING INFORMATION
SL4013BN Plastic
SL4013BD SOIC
TA = -55° to 125° C for all packages
PIN ASSIGNMENT
PIN 14 =VCC
PIN 7 = GND
SLS
System Logic
Semiconductor
2.5 V min @ 15.0 V supply
FUNCTION TABLE
Inputs
Clock Data Reset Set
L LL
H LL
X LL
X X HL
X X LH
X X HH
Outputs
QQ
LH
HL
QQ
LH
HL
HH
X = don’t care
1 page SL4013B
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms
Figure 3. Switching Waveforms
EXPANDED LOGIC DIAGRAM
(1/2 of the Device)
SLS
System Logic
Semiconductor
5 Page |
Páginas | Total 5 Páginas | |
PDF Descargar | [ Datasheet SL4013BN.PDF ] |
Número de pieza | Descripción | Fabricantes |
SL4013B | Dual D Flip-Flop | System Logic Semiconductor |
SL4013BD | Dual D Flip-Flop | System Logic Semiconductor |
SL4013BN | Dual D Flip-Flop | System Logic Semiconductor |
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