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PDF SL2610LH2N Data sheet ( Hoja de datos )

Número de pieza SL2610LH2N
Descripción Wide Dynamic Range Image Reject MOPLL
Fabricantes Zarlink Semiconductor Inc 
Logotipo Zarlink Semiconductor Inc Logotipo



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SL2610
Wide Dynamic Range Image Reject MOPLL
Features
• Single chip mixer/oscillator PLL combination for
multi band tuner for DTT applications
• Each mixer oscillator band optimized for wide
dynamic range
• RF input stages allow for either single-ended or
differential drive
• PLL frequency synthesizer designed for low
phase noise performance
• Broadband output level detect with onset adjust
• PLL frequency synthesizer compatible with
standard digital terrestrial offsets
• Four integrated switching ports
• I2C fast mode compliant
• ESD protection (Normal ESD handling
procedures should be observed)
Applications
• Terrestrial digital receiver systems
• Terrestrial analogue receiver systems
• Cable receiver systems
• Data communications systems
Data Sheet
October 2004
Ordering Information
SL2610/IG/LH1Q 40 Pin MLP Tape & Reel, Bake & Drypack
SL2610/IG/LH1N 40 Pin MLP Trays, Bake & Drypack
SL2610/IG/LH2Q 40 Pin MLP Tape & Reel, Bake & Drypack*
SL2610/IG/LH2N 40 Pin MLP Trays, Bake & Drypack*
*Leadfree
-40°C to +85°C
Description
The SL2610 is a mixer oscillator intended primarily
for application in all band tuners, where it performs
image reject downconversion of the RF channel to a
standard 36 MHz or 44 MHz IF.
Each band consists of a low noise preamplifier/mixer
and local oscillator with an external varactor tuned
tank. The band outputs share a common low
impedance SAWF driver stage.
Frequency selection is controlled by the on-board I2C
bus frequency synthesizer. This block also controls
four general purpose switching ports for selecting the
prefilter/AGC stages.
CHARGE
PUMP
DRIVE
XTAL
XTALCAP
PORT P0
PORT P1
PORT P2
PORT P3
PROG
DIVIDER
HI LO MID
BAND BAND BAND
~ ~~
~
REF
DIVIDER
IF
SELECT
Port
Interface
I2C
Interface
SDA SCL ADD
HI LO MID
BAND BAND BAND
Figure 1 - SL2610 Block Diagram
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2003-2004, Zarlink Semiconductor Inc. All Rights Reserved.
CONVOP
CONVOPB
IFIP
IFIPB
IFOP
IFOPB
AGC BIAS
AGC OUT

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SL2610LH2N pdf
SL2610
Data Sheet
1.0 Functional Description
The SL2610 is a multi band RF mixer oscillator with image reject and on-board frequency synthesizer. It is intended
primarily for application in all band terrestrial tuners and requires a minimum external component count. It contains
all elements required for RF downconversion to a standard IF with the exception of external VCO tank circuits.
The pin allocation is contained in Figure 2 and the block diagram in Figure 1.
1.1 Mixer/oscillator section
In normal application the RF input is interfaced to the selected mixer oscillator preamplifier through the tuner
prefilter and AGC stages. The mixer input is arranged such that the signal can be coupled either differentially or
single-ended, and achieves the specified minimum performance in both configurations. Band input impedances
and NF are contained in Figure 11 and Figure 12 respectively. The converter two tone input spectra are contained
in Figure 13 and Figure 14.
The preamplifier output then feeds the mixer stage where the required channel is image reject downconverted to
the IF frequency. The local oscillator frequency for the downconversion is obtained from the on board local
oscillator, which uses an external varactor tuned tank. Typical VCO applications are contained in Figures 8, 9 and
10.
The output of the mixer is then fed to the converter output driver which presents a matched 200 differential load
to an external IF shaping filter.
The output of the shaping filter is then coupled into the IFAMP stage, which provides further gain and offers a 50
output impedance to interface direct with the tuner SAW filter.
The SL2610 contains a broadband level detect circuit whose output can be used to control the tuner AGC. The
target level of the AGC detector is controlled by the voltage applied to the AGCBIAS pin. The characteristic of the
target level is given in Figure 18.
1.2 PLL Frequency Synthesizer
The PLL frequency synthesizer section contains all the elements necessary, with the exception of a frequency
reference and loop filter, to control a varicap tuned local oscillator, so forming a complete PLL frequency
synthesised source. The device allows for operation with a high comparison frequency and is fabricated in high
speed logic, which enables the generation of a loop with good phase noise performance. It can also be operated
with comparison frequencies appropriate for frequency offsets as required in digital terrestrial (DTT) receivers.
The LO signal is multiplexed from the selected oscillator section to an internal preamplifier which provides gain and
reverse isolation from the divider signals. The output of the preamplifier interfaces direct with the 15-bit fully
programmable divider which is of MN+A architecture, where the dual modulus prescaler is 16/17, the A counter is
4-bits and the M counter is 11 bits.
The output of the programmable divider is fed to the phase comparator where it is compared in both phase and
frequency domain with the comparison frequency. This frequency is derived either from the on-board crystal
controlled oscillator or from an external reference source. In both cases the reference frequency is divided down to
the comparison frequency by the reference divider which is programmable into 1 of 29 ratios as detailed in Table 1.
The output of the phase detector feeds a charge pump and loop amplifier section which when used with an external
loop filter integrates the current pulses into the varactor line voltage.
The programmable divider output Fpd, divided by two and the reference divider output Fcomp, can be switched to
port P0 by programming the device into test mode. The test modes are described in Table 5.
5
Zarlink Semiconductor Inc.

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SL2610LH2N arduino
IF input
0
0
1
SL2610
C1 C0
Current in µA
Min.
Typ. Max.
0
0
+85
+130
+175
0
1
+190
+280
+370
1
0
+420
+600
+780
1
1
+930
+1300
+1670
Table 6 - Charge pump current
BS1
0
0
1
1
BS0 Band Selected
0 LO Band
1 MID Band
0 HI band
1 HI band
Table 7 - Band select
Data Sheet
Centre of Image Reject Passband
57 MHz
44 MHz
36 MHz
Table 8 - IF SELECT function
Passband
Bandwidth
6 MHz
6 MHz
8 MHz
11
Zarlink Semiconductor Inc.

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