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ISL6526 の電気的特性と機能

ISL6526のメーカーはIntersil Corporationです、この部品の機能は「Single Synchronous Buck Pulse-Width Modulation (PWM) Controller」です。


製品の詳細 ( Datasheet PDF )

部品番号 ISL6526
部品説明 Single Synchronous Buck Pulse-Width Modulation (PWM) Controller
メーカ Intersil Corporation
ロゴ Intersil Corporation ロゴ 




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ISL6526 Datasheet, ISL6526 PDF,ピン配置, 機能
®
Data Sheet
Single Synchronous Buck Pulse-Width
Modulation (PWM) Controller
The ISL6526 makes simple work out of implementing a
complete control and protection scheme for a DC-DC
stepdown converter. Designed to drive N-Channel
MOSFETs in a synchronous buck topology, the ISL6526
integrates the control, output adjustment, monitoring and
protection functions into a single package.
The ISL6526 provides simple, single feedback loop, voltage-
mode control with fast transient response. The output
voltage can be precisely regulated to as low as 0.8V, with a
maximum tolerance of ±1.5% over temperature and line
voltage variations. A fixed frequency oscillator reduces
design complexity, while balancing typical application cost
and efficiency.
The error amplifier features a 15MHz gain-bandwidth
product and 6V/µs slew rate which enables high converter
bandwidth for fast transient performance. The resulting
PWM duty cycles range from 0% to 100%.
Protection from overcurrent conditions is provided by
monitoring the rDS(ON) of the upper MOSFET to inhibit PWM
operation appropriately. This approach simplifies the
implementation and improves efficiency by eliminating the
need for a current sense resistor.
Ordering Information
TEMP
PART NUMBER RANGE (oC)
PACKAGE PKG DWG. #
ISL6526CB
0 to 70 14 Lead SOIC M14.15
ISL6526ACB
0 to 70 14 Lead SOIC M14.15
ISL6526CR
0 to 70 16 Lead 5x5 QFN L16.5x5B
ISL6526ACR
0 to 70 16 Lead 5x5 QFN L16.5x5B
ISL6526IB
-40 to 85 14 Lead SOIC M14.15
ISL6526AIB
-40 to 85 14 Lead SOIC M14.15
ISL6526IR
-40 to 85 16 Lead 5x5 QFN L16.5x5B
ISL6526AIR
-40 to 85 16 Lead 5x5 QFN L16.5x5B
ISL6526EVAL1 ISL6526 SOIC Evaluation Board
ISL6526EVAL2 ISL6526 QFN Evaluation Board
ISL6526AEVAL1 ISL6526A SOIC Evaluation Board
ISL6526AEVAL2 ISL6526A QFN Evaluation Board
ISL6526
July 2003
FN9055.3
Features
• Operates from 3.3V to 5V Input
• 0.8V to VIN Output Range
- 0.8V Internal Reference
- ±1.5% Over Load, Line Voltage and Temperature
• Drives N-Channel MOSFETs
• Simple Single-Loop Control Design
- Voltage-Mode PWM Control
• Fast Transient Response
- High-Bandwidth Error Amplifier
- Full 0% to 100% Duty Cycle
• Lossless, Programmable Overcurrent Protection
- Uses Upper MOSFET’s rDS(on)
• Converter can Source and Sink Current
• Small Converter Size
- Internal Fixed Frequency Oscillator
- ISL6526: 300kHz
- ISL6526A: 600kHz
• Internal Soft-Start
• 14 Lead SOIC or 16 Lead, 5x5 QFN
• QFN Package:
- Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat
No Leads - Package Outline
- Near Chip Scale Package footprint, which improves
PCB efficiency and has a thinner profile
Applications
• Power Supplies for Microprocessors
- PCs
- Embedded Controllers
• Subsystem Power Supplies
- PCI/AGP/GTL+ Busses
- ACPI Power Control
- DDR SDRAM Bus Termination Supply
• Cable Modems, Set Top Boxes, and DSL Modems
• DSP and Core Communications Processor Supplies
• Memory Supplies
• Personal Computer Peripherals
• Industrial Power Supplies
• 3.3V-Input DC-DC Regulators
• Low-Voltage Distributed Power Supplies
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.

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ISL6526 pdf, ピン配列
Typical Application - 5V Input
+5V
VIN
ISL6526
DISABLE
VCC
CT1 OCSET
ROCSET
N/C CT2
ISL6526
CPVOUT
DBOOT
CPGND
GND
BOOT
UGATE
PHASE
CBOOT
ENABLE
COMP
LGATE
FB
CIN
CBULK
CHF
Q1 LOUT
Q2 COUT
CI
RF CF
ROFFSET
RFB
VOUT
Block Diagram
VCC
CPVOUT
CT1
CT2
CPGND
OCSET
CHARGE
PUMP
20µA
+
-
OC
COMPARATOR
POWER-ON
RESET (POR)
SOFTSTART
+
0.8V
-
ERROR
AMP
+
-
PWM
COMPARATOR
+
-
GATE
CONTROL
PWM LOGIC
FB
COMP
3
OSCILLATOR
FIXED 300kHz or 600kHz
GND
ENABLE
BOOT
UGATE
PHASE
LGATE


3Pages


ISL6526 電子部品, 半導体
ISL6526
ENABLE
This pin is the open-collector enable pin. Pulling this pin to a
level below 0.8V will disable the controller. Disabling the
ISL6526 causes the oscillator to stop, the LGATE and
UGATE outputs to be held low, and the softstart circuitry to
re-arm.
CT1 and CT2
These pins are the connections for the external charge
pump capacitor. A minimum of a 0.1µF ceramic capacitor is
recommended for proper operation of the IC.
CPVOUT
This pin represents the output of the charge pump. The
voltage at this pin is the bias voltage for the IC. Connect a
decoupling capacitor from this pin to ground. The value of
the decoupling capacitor should be at least 10x the value of
the charge pump capacitor. This pin may be tied to the
bootstrap circuit as the source for creating the BOOT
voltage.
CPGND
This pin represents the signal and power ground for the
charge pump. Tie this pin to the ground island/plane through
the lowest impedance connection available.
Functional Description
Initialization
The ISL6526 automatically initializes upon receipt of power.
Special sequencing of the input supplies is not necessary.
The Power-On Reset (POR) function continually monitors
the the output voltage of the charge pump. During POR, the
charge pump operates on a free running oscillator. Once the
POR level is reached, the charge pump oscillator is synched
to the PWM oscillator. The POR function also initiates the
soft-start operation after the charge pump output voltage
exceeds its POR threshold.
Soft-Start
The POR function initiates the digital soft-start sequence.
The PWM error amplifier reference is clamped to a level
proportional to the soft-start voltage. As the soft-start voltage
slews up, the PWM comparator generates PHASE pulses of
increasing width that charge the output capacitor(s). This
method provides a rapid and controlled output voltage rise.
The soft start sequence typically takes about 6.5ms.
Figure 1 shows the soft-start sequence for a typical application.
At t0, the +3.3V VCC voltage starts to ramp. At time t1, the
Charge Pump begins operation and the +5V CPVOUT IC bias
voltage starts to ramp up. Once the voltage on CPVOUT
crosses the POR threshold at time t2, the output begins the
soft-start sequence. The triangle waveform from the PWM
oscillator is compared to the rising error amplifier output
voltage. As the error amplifier voltage increases, the pulse-
width on the UGATE pin increases to reach the steady-state
duty cycle at time t3.
(1V/DIV)
CPVOUT (5V)
VCC (3.3V)
VOUT (2.50V)
0V
T0 T2
T1
T3
TIME
FIGURE 1. SOFT-START INTERVAL
Shoot-Through Protection
A shoot-through condition occurs when both the upper
MOSFET and lower MOSFET are turned on simultaneously,
effectively shorting the input voltage to ground. To protect
the regulator from a shoot-through condition, the ISL6526
incorporates specialized circuitry which insures that the
complementary MOSFETs are not ON simultaneously.
The adaptive shoot-through protection utilized by the
ISL6526 looks at the lower gate drive pin, LGATE, and the
upper gate drive pin, UGATE, to determine whether a
MOSFET is ON or OFF. If the voltage from UGATE or from
LGATE to GND is less than 0.8V, then the respective
MOSFET is defined as being OFF and the complementary
MOSFET is turned ON. This method of shoot-through
protection allows the regulator to sink or source current.
Since the voltage of the lower MOSFET gate and the upper
MOSFET gate are being measured to determine the state of
the MOSFET, the designer is encouraged to consider the
repercussions of introducing external components between
the gate drivers and their respective MOSFET gates before
actually implementing such measures. Doing so may
interfere with the shoot-through protection.
Output Voltage Selection
The output voltage can be programmed to any level between
VIN and the internal reference, 0.8V. An external resistor
divider is used to scale the output voltage relative to the
reference voltage and feed it back to the inverting input of
the error amplifier, see Figure 2. However, since the value of
R1 affects the values of the rest of the compensation
components, it is advisable to keep its value less than 5k.
R4 can be calculated based on the following equation:
R4 = -V----O-R---U--1--T---×-1----0–---.--80---V.--8----V--
6

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共有リンク

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