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ISL6524A の電気的特性と機能

ISL6524AのメーカーはIntersil Corporationです、この部品の機能は「VRM8.5 PWM and Triple Linear Power System Controller」です。


製品の詳細 ( Datasheet PDF )

部品番号 ISL6524A
部品説明 VRM8.5 PWM and Triple Linear Power System Controller
メーカ Intersil Corporation
ロゴ Intersil Corporation ロゴ 




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ISL6524A Datasheet, ISL6524A PDF,ピン配置, 機能
®
Data Sheet
March 2002
ISL6524A
FN9064
VRM8.5 PWM and Triple Linear Power
System Controller
The ISL6524A provides the power control and protection for
four output voltages in high-performance microprocessor
and computer applications. The IC integrates one PWM
controller and three linear controllers, as well as the
monitoring and protection functions into a 28-pin SOIC
package. The PWM controller regulates the microprocessor
core voltage with a synchronous-rectified buck converter.
One linear controller supplies the computer system’s AGTL+
1.2V bus power. The other two linear controllers regulate
power for the 1.5V AGP bus and the 1.8V power for the
chipset core voltage and/or cache memory circuits.
The ISL6524A includes an Intel VRM8.5 compatible, TTL
5-input digital-to-analog converter (DAC) that adjusts the
microprocessor core-targeted PWM output voltage from
1.050V to 1.825V in 25mV steps. The precision reference
and voltage-mode control provide ±1% static regulation. The
linear regulators use external N-channel MOSFETs or
bipolar NPN pass transistors to provide fixed output voltages
of 1.2V ±3% (VOUT2), 1.5V ±3% (VOUT3) and 1.8V ±3%
(VOUT4).
The ISL6524A monitors all the output voltages. A delayed-
rising VTT (VOUT2 output) Power Good signal is issued
before the core PWM starts to ramp up. Another system
Power Good signal is issued when the core is within ±10% of
the DAC setting and all other outputs are above their under-
voltage levels. Additional built-in over-voltage protection for
the core output uses the lower MOSFET to prevent output
voltages above 115% of the DAC setting. The PWM
controllers’ over-current function monitors the output current
by using the voltage drop across the upper MOSFET’s
rDS(ON), eliminating the need for a current sensing resistor.
Ordering Information
TEMP.
PART NUMBER RANGE (oC)
PACKAGE
ISL6524ACB
0 to 70 28 Ld SOIC
ISL6524EVAL1 Evaluation Board
PKG.
NO.
M28.3
Features
• Provides 4 Regulated Voltages
- Microprocessor Core, AGTL+ Bus, AGP Bus Power,
and North/South Bridge Core
• Drives N-Channel MOSFETs
• Linear Regulator Drives Compatible with both MOSFET
and Bipolar Series Pass Transistors
• Simple Single-Loop Control Design
- Voltage-Mode PWM Control
• Fast PWM Converter Transient Response
- High-Bandwidth Error Amplifier
- Full 0% to 100% Duty Ratio
• Excellent Output Voltage Regulation
- Core PWM Output: ±1% Over Temperature
- All Other Outputs: ±3% Over Temperature
• VRM8.5 TTL-Compatible 5-Bit DAC Microprocessor Core
Output Voltage Selection
- Wide Range - 1.050V to 1.825V
• Power-Good Output Voltage Monitors
- Separate delayed VTT Power Good
• Over-Voltage and Over-Current Fault Monitors
- Switching Regulator Doesn’t Require Extra Current
Sensing Element, Uses MOSFET’s rDS(ON)
• Small Converter Size
- Constant Frequency Operation
- 200kHz Internal Oscillator
Applications
Motherboard Power Regulation for Computers
Pinout
ISL6524A (SOIC)
TOP VIEW
DRIVE2 1
FIX 2
VID3 3
VID2 4
VID1 5
VID0 6
VID25 7
PGOOD 8
VTTPG 9
FAULT/RT 10
VSEN2 11
SS24 12
SS13 13
VSEN4 14
28 VCC
27 UGATE
26 PHASE
25 LGATE
24 PGND
23 OCSET
22 VSEN1
21 FB
20 COMP
19 VSEN3
18 DRIVE3
17 GND
16 VAUX
15 DRIVE4
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved

1 Page





ISL6524A pdf, ピン配列
+5VIN
VOUT2
Q3
+3.3VIN
VOUT3
Q4
ISL6524A
LINEAR
CONTROLLER
PWM1
CONTROLLER
ISL6524A
LINEAR
CONTROLLER
LINEAR
CONTROLLER
Q1
VOUT1
Q2
Q5
VOUT4
FIGURE 2. SIMPLIFIED POWER SYSTEM DIAGRAM
+12VIN
+5VIN
LIN
CIN
VCC
VOUT2
1.2V
COUT2
Q3 DRIVE2
FAULT/RT
FIX
VSEN2
VTT POWERGOOD
+3.3VIN
VOUT3
1.5V
COUT3
VOUT4
1.8V
COUT4
VTTPG
VAUX
Q4 DRIVE3
VSEN3
DRIVE4
Q5
VSEN4
SS24
CSS24
ISL6524A
GND
OCSET
PGOOD
UGATE
PHASE
LGATE
PGND
VSEN1
FB
COMP
POWERGOOD
Q1
LOUT1
VOUT1
1.3V to 3.5V
Q2 COUT1
VID3
VID2
VID1
VID0
VID25
SS13
CSS13
FIGURE 3. TYPICAL APPLICATION
3


3Pages


ISL6524A 電子部品, 半導体
ISL6524A
Functional Pin Descriptions
VCC (Pin 28)
Provide a 12V bias supply for the IC to this pin. This pin also
provides the gate bias charge for all the MOSFETs
controlled by the IC. The voltage at this pin is monitored for
Power-On Reset (POR) purposes.
GND (Pin 17)
Signal ground for the IC. All voltage levels are measured
with respect to this pin.
PGND (Pin 24)
This is the power ground connection. Tie the synchronous
PWM converter’s lower MOSFET source to this pin.
VAUX (Pin 16)
Connect this pin to the ATX 3.3V output. The voltage present
at this pin is monitored for sequencing purposes. This pin
provides the necessary base bias for the NPN pass
transistors, as well as the current sunk through the 5kVID
pull-up resistors.
SS13 (Pin 13)
Connect a capacitor from this pin to ground. This capacitor,
along with an internal 28µA current source, sets the
soft-start interval of the synchronous switching converter
(VOUT1) and the AGP regulator (VOUT3). A VTTPG high
signal is also delayed by the time interval required by the
charging of this capacitor from 0V to 1.25V (see Soft-Start
details).
SS24 (Pin 12)
Connect a capacitor from this pin to ground. This capacitor,
along with an internal 28µA current source, sets the
soft-start interval of the VOUT2 regulator. Pulling this pin
below 0.8V induces a chip reset (POR) and shutdown.
VTTPG (Pin 9)
VTTPG is an open collector output used to indicate the
status of the VOUT2 regulator output voltage. This pin is
pulled low when the VOUT2 output is below the under-
voltage threshold or when the SS13 pin is below 1.25V.
PGOOD (Pin 8)
PGOOD is an open collector output used to indicate the
status of the output voltages. This pin is pulled low when the
synchronous regulator output is not within ±10% of the
DACOUT reference voltage or when any of the other outputs
is below its under-voltage threshold.
VID3, VID2, VID1, VID0, VID25 (Pins 3-7)
VID3-25 are the TTL-compatible input pins to the 5-bit DAC.
The logic states of these five pins program the internal
voltage reference (DACOUT). The level of DACOUT sets the
microprocessor core converter output voltage (VOUT1), as
well as the corresponding PGOOD and OVP thresholds.
Each VID pin is connected to the VAUX pin through a 5k
pull-up resistor.
OCSET (Pin 23)
Connect a resistor (ROCSET) from this pin to the drain of the
upper MOSFET. ROCSET, an internal 200µA current source
(IOCSET), and the upper MOSFET’s on-resistance (rDS(ON))
set the converter over-current (OC) trip point according to
the following equation:
IPEAK
=
I--O-----C----S----E----T-----×----R-----O----C-----S----E----T-
rDS(ON)
An over-current trip cycles the soft-start function.
The voltage at OCSET pin is monitored for power-on reset
(POR) purposes.
PHASE (Pin 26)
Connect the PHASE pin to the PWM converter’s upper
MOSFET source. This pin represents the gate drive return
current path and is used to monitor the voltage drop across
the upper MOSFET for over-current protection.
UGATE (Pin 27)
Connect UGATE pin to the PWM converter’s upper
MOSFET gate. This pin provides the gate drive for the upper
MOSFET.
LGATE (Pin 25)
Connect LGATE to the synchronous PWM converter’s lower
MOSFET gate. This pin provides the gate drive for the lower
MOSFET.
COMP and FB (Pins 20, 21)
COMP and FB are the available external pins of the
synchronous PWM regulator error amplifier. The FB pin is
the inverting input of the error amplifier. Similarly, the COMP
pin is the error amplifier output. These pins are used to
compensate the voltage-mode control feedback loop of the
synchronous PWM converter.
VSEN1 (Pin 22)
This pin is connected to the synchronous PWM converters’
output voltage. The PGOOD and OVP comparator circuits
use this signal to report output voltage status and for over-
voltage protection.
DRIVE2 (Pin 1)
Connect this pin to the gate/base of a N-type external pass
transistor (MOSFET or bipolar). This pin provides the drive
for the 1.2V regulator’s pass transistor.
VSEN2 (Pin 11)
Connect this pin to the output of the standard buck PWM
regulator. The voltage at this pin is regulated to a 1.2V level.
This pin is also monitored for under-voltage events.
FIX (Pin 2)
6

6 Page



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部品番号部品説明メーカ
ISL6524

VRM8.5 PWM and Triple Linear Power System Controller

Intersil Corporation
Intersil Corporation
ISL6524A

VRM8.5 PWM and Triple Linear Power System Controller

Intersil Corporation
Intersil Corporation


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