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ISL6520 の電気的特性と機能

ISL6520のメーカーはIntersil Corporationです、この部品の機能は「Single Synchronous Buck Pulse-Width Modulation (PWM) Controller」です。


製品の詳細 ( Datasheet PDF )

部品番号 ISL6520
部品説明 Single Synchronous Buck Pulse-Width Modulation (PWM) Controller
メーカ Intersil Corporation
ロゴ Intersil Corporation ロゴ 




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ISL6520 Datasheet, ISL6520 PDF,ピン配置, 機能
®
Data Sheet
March 2003
ISL6520
FN9009.2
Single Synchronous Buck Pulse-Width
Modulation (PWM) Controller
The ISL6520 makes simple work out of implementing a
complete control and protection scheme for a DC-DC
stepdown converter. Designed to drive N-channel MOSFETs
in a synchronous buck topology, the ISL6520 integrates the
control, output adjustment, monitoring and protection
functions into a single 8-pin package.
The ISL6520 provides simple, single feedback loop, voltage-
mode control with fast transient response. The output
voltage can be precisely regulated to as low as 0.8V, with a
maximum tolerance of ±1.5% over temperature and line
voltage variations. A fixed frequency oscillator reduces
design complexity, while balancing typical application cost
and efficiency.
The error amplifier features a 15MHz gain-bandwidth
product and 8V/µs slew rate which enables high converter
bandwidth for fast transient performance. The resulting
PWM duty cycles range from 0% to 100%.
Protection from over-current conditions is provided by
monitoring the rDS(ON) of the upper MOSFET to inhibit PWM
operation appropriately. This approach simplifies the
implementation and improves efficiency by eliminating the
need for a current sense resistor.
Ordering Information
PART NUMBER
ISL6520CB
TEMP.
RANGE (oC)
PACKAGE
0 to 70 8 Ld SOIC
PKG.
NO.
M8.15
ISL6520IB
ISL6520CR
ISL6520IR
ISL6520EVAL1
-40 to 85 8 Ld SOIC
M8.15
0 to 70 16 Ld 4x4mm QFN L16.4x4
-40 to 85 16 Ld 4x4mm QFN L16.4x4
Evaluation Board
Features
• Operates from +5V Input
• 0.8V to VIN Output Range
- 0.8V Internal Reference
- ±1.5% Over Line Voltage and Temperature
• Drives N-Channel MOSFETs
• Simple Single-Loop Control Design
- Voltage-Mode PWM Control
• Fast Transient Response
- High-Bandwidth Error Amplifier
- Full 0% to 100% Duty Cycle
• Lossless, Programmable Over-Current Protection
- Uses Upper MOSFET’s rDS(on)
• Small Converter Size
- 300kHz Fixed Frequency Oscillator
- Internal Soft Start
- 8 Ld SOIC or 16Ld 4x4mm QFN
• QFN Package:
- Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat
No Leads - Package Outline
- Near Chip Scale Package footprint, which improves
PCB efficiency and has a thinner profile
Applications
• Power Supplies for Microprocessors
- PCs
- Embedded Controllers
• Subsystem Power Supplies
- PCI/AGP/GTL+ Buses
- ACPI Power Control
• Cable Modems, Set Top Boxes, and DSL Modems
• DSP and Core Communications Processor Supplies
• Memory Supplies
• Personal Computer Peripherals
• Industrial Power Supplies
• 5V-Input DC-DC Regulators
• Low-Voltage Distributed Power Supplies
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

1 Page





ISL6520 pdf, ピン配列
ISL6520
Absolute Maximum Ratings
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +6.0V
Absolute Boot Voltage, VBOOT . . . . . . . . . . . . . . . . . . . . . . . +15.0V
Upper Driver Supply Voltage, VBOOT - VPHASE . . . . . . . . . . . +6.0V
Input, Output or I/O Voltage . . . . . . . . . . . GND -0.3V to VCC +0.3V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 2
Recommended Operating Conditions
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V ±10%
Ambient Temperature Range - ISL6520C . . . . . . . . . . . 0oC to 70oC
Ambient Temperature Range - ISL6520I . . . . . . . . . . -40oC to 85oC
Junction Temperature Range . . . . . . . . . . . . . . . . . -40oC to 125oC
Thermal Information
Thermal Resistance
θJA (oC/W) θJC (oC/W)
SOIC Package (Note 1) . . . . . . . . . . . . . . 95
N/A
QFN Package (Note 2, 3). . . . . . . . . . . . . . 45
7
Maximum Junction Temperature
(Plastic Package) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . -65oC to 150oC
Maximum Lead Temperature
(Soldering 10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
2. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
3. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted.
PARAMETER
VCC SUPPLY CURRENT
Nominal Supply
POWER-ON RESET
Rising VCC POR Threshold
SYMBOL
TEST CONDITIONS
IVCC
UGATE and LGATE Open
POR
VCC POR Threshold Hysteresis
OSCILLATOR
Frequency
Ramp Amplitude
REFERENCE
Reference Voltage Tolerance
Nominal Reference Voltage
ERROR AMPLIFIER
fOSC
VOSC
ISL6520C, VCC = 5V
ISL6520I, VCC = 5V
VREF
ISL6520C
ISL6520I
DC Gain
Guaranteed By Design
Gain-Bandwidth Product
GBWP
Slew Rate
SR
GATE DRIVERS
Upper Gate Source Current
Upper Gate Sink Current
Lower Gate Source Current
Lower Gate Sink Current
PROTECTION / DISABLE
IUGATE-
SRC
IUGATE-SNK
ILGATE-SRC
ILGATE-SNK
OCSET Current Source
Disable Threshold
IOCSET
VDISABLE
ISL6520C
ISL6520I
MIN
2.6
4.19
-
250
230
-
-1.5
-2.5
-
-
-
-
-
-
-
-
17
14
-
TYP
3.2
4.30
0.25
300
300
1.5
-
0.800
88
15
8
-1
1
-1
2
20
20
0.8
MAX
3.8
4.5
-
340
340
-
+1.5
+2.5
-
-
-
-
-
-
-
-
22
24
-
UNITS
mA
V
V
kHz
kHz
VP-P
%
%
V
dB
MHz
V/µs
A
A
A
A
µA
µA
V
3


3Pages


ISL6520 電子部品, 半導体
ISL6520
Please note that the capacitors CIN and CO may each
represent numerous physical capacitors. Locate the ISL6520
within 3 inches of the MOSFETs, Q1 and Q2 . The circuit traces
for the MOSFETs’ gate and source connections from the
ISL6520 must be sized to handle up to 1A peak current.
Figure 4 shows the circuit traces that require additional layout
consideration. Use single point and ground plane construction
for the circuits shown. Minimize any leakage current paths on
the COMP/OCSET pin and locate the resistor, ROSCET close
to the COMP/OCSET pin because the internal current source is
only 20µA. Provide local VCC decoupling between VCC and
GND pins. Locate the capacitor, CBOOT as close as practical to
the BOOT and PHASE pins. All components used for feedback
compensation should be located as close to the IC a practical.
+5V
ISL6520
COMP/OCSET
GND
BOOT
CBOOT
D1
PHASE
VCC +5V
CVCC
+VIN
Q1 LO
Q2 CO
VOUT
FIGURE 4. PRINTED CIRCUIT BOARD SMALL SIGNAL
LAYOUT GUIDELINES
Feedback Compensation
Figure 5 highlights the voltage-mode control loop for a
synchronous-rectified buck converter. The output voltage
(VOUT) is regulated to the Reference voltage level. The
error amplifier (Error Amp) output (VE/A) is compared with
the oscillator (OSC) triangular wave to provide a pulse-
width modulated (PWM) wave with an amplitude of VIN at
the PHASE node. The PWM wave is smoothed by the output
filter (LO and CO).
Modulator Break Frequency Equations
FLC=
---------------------1---------------------
2π x LO x CO
FESR= 2----π------x-----E----S--1---R------x-----C-----O---
The compensation network consists of the error amplifier
(internal to the ISL6520) and the impedance networks ZIN
and ZFB. The goal of the compensation network is to provide
a closed loop transfer function with the highest 0dB crossing
frequency (f0dB) and adequate phase margin. Phase margin
is the difference between the closed loop phase at f0dB and
180 degrees. The equations below relate the compensation
network’s poles, zeros and gain to the components (R1, R2,
R3, C1, C2, and C3) in Figure 7. Use these guidelines for
locating the poles and zeros of the compensation network:
1. Pick Gain (R2/R1) for desired converter bandwidth.
2. Place 1ST Zero Below Filter’s Double Pole (~75% FLC).
3. Place 2ND Zero at Filter’s Double Pole.
4. Place 1ST Pole at the ESR Zero.
5. Place 2ND Pole at Half the Switching Frequency.
6. Check Gain against Error Amplifier’s Open-Loop Gain.
7. Estimate Phase Margin - Repeat if Necessary.
VOSC
OSC
PWM
COMPARATOR
-
+
DRIVER
DRIVER
VIN
LO
PHASE CO
VOUT
ZFB
VE/A
-
+
ZIN
ERROR REFERENCE
AMP
ESR
(PARASITIC)
DETAILED COMPENSATION COMPONENTS
C2
C1 R2
ZFB VOUT
ZIN
C3 R3
COMP
-
+
FB
ISL6520
REFERENCE
R1
FIGURE 5. VOLTAGE-MODE BUCK CONVERTER
COMPENSATION DESIGN
The modulator transfer function is the small-signal transfer
function of VOUT/VE/A. This function is dominated by a DC
Gain and the output filter (LO and CO), with a double pole
break frequency at FLC and a zero at FESR. The DC Gain of
the modulator is simply the input voltage (VIN) divided by the
peak-to-peak oscillator voltage VOSC.
Compensation Break Frequency Equations
FZ1 = -2---π------x-----R--1--2------x-----C----1-
FZ2 = 2----π------x-----(--R-----1----+-1----R-----3---)----x-----C-----3-
FP1
=
---------------------------1-----------------------------
2π
x
R2
x
C-C----11-----+x-----CC----2-2-
FP2 = -2---π------x-----R--1--3------x-----C----3-
Figure 6 shows an asymptotic plot of the DC-DC converter’s
gain vs frequency. The actual Modulator Gain has a high gain
peak due to the high Q factor of the output filter and is not
shown in Figure 6. Using the above guidelines should give a
Compensation Gain similar to the curve plotted. The open
loop error amplifier gain bounds the compensation gain.
6

6 Page



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共有リンク

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部品番号部品説明メーカ
ISL6520

Single Synchronous Buck Pulse-Width Modulation (PWM) Controller

Intersil Corporation
Intersil Corporation
ISL6520A

Single Synchronous Buck Pulse-Width Modulation (PWM) Controller

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Intersil Corporation
ISL6520B

Single Synchronous Buck Pulse-Width Modulation (PWM) Controller

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ISL6521

PWM Buck DC-DC and Triple Linear Power Controller

Intersil
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