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PDF ISL6431 Data sheet ( Hoja de datos )
| Número de pieza | ISL6431 | |
| Descripción | Advanced Pulse-Width Modulation (PWM) Controller for Home Gateways | |
| Fabricantes | Intersil Corporation | |
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TM
Data Sheet
ISL6431
June 2001
File Number 9018
Advanced Pulse-Width Modulation (PWM)
Controller for Home Gateways
The ISL6431 is a high efficiency, fixed frequency,
synchronous buck PWM controller. It is designed for use in
applications that convert 5V to lower distributed voltages
required for set-top box, cable modem, DSL modem and
residential home gateway core processor, memory and
peripheral power supplies.
This device makes simple work out of implementing a
complete control and protection scheme for a DC-DC
stepdown converter. Designed to drive N-channel MOSFETs
in a synchronous buck topology, the ISL6431 integrates the
control, output adjustment, monitoring and protection
functions into a single 8-pin package.
The ISL6431 provides simple, single feedback loop, voltage-
mode control with fast transient response. The output
voltage can be precisely regulated to as low as 0.8V, with a
maximum tolerance of ±1.5% over temperature and line
voltage variations. A fixed frequency oscillator reduces
design complexity, while balancing typical application cost
and efficiency.
The error amplifier features a 15MHz gain-bandwidth
product and 6V/µs slew rate which enables high converter
bandwidth for fast transient performance. The resulting
PWM duty cycles range from 0% to 100%.
Protection from overcurrent conditions is provided by
monitoring the rDS(ON) of the upper MOSFET to inhibit PWM
operation appropriately. This approach simplifies the
implementation and improves efficiency by eliminating the
need for a current sense resistor.
Ordering Information
TEMP. RANGE
PART NUMBER
(oC)
PACKAGE
ISL6431CB
0 to 70 8 Ld SOIC
ISL6431IB
-40 to 85 8 Ld SOIC
ISL6431EVAL1
Evaluation Board
PKG.
NO.
M8.15
M8.15
Features
• Operates from +5V Input
• 0.8V to VIN Output Range
- 0.8V Internal Reference
- ±1.5% Over Line Voltage and Temperature
• Drives N-Channel MOSFETs
• Simple Single-Loop Control Design
- Voltage-Mode PWM Control
• Fast Transient Response
• Lossless, Programmable Overcurrent Protection
- Uses Upper MOSFET’s rDS(ON)
• Small Converter Size
- 300kHz Fixed Frequency Oscillator
- Internal Soft Start
- 8 Lead SOIC Package
• High Conversion Efficiency
• Synchronous/Standard Buck Configuration
Applications
• Cable Modems, Set Top Boxes, and DSL Modems
• DSP and Core Communications Processor Supplies
• Power Supplies for Microprocessors and Embedded
Controllers
• Memory Supplies
• Personal Computer Peripherals
• Industrial Power Supplies
• 5V-Input DC-DC Regulators
• Low-Voltage Distributed Power Supplies
Pinout
BOOT 1
UGATE 2
GND 3
LGATE 4
8 PHASE
7 COMP/OCSET
6 FB
5 VCC
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2001, All Rights Reserved
1 page  
ISL6431
completion of the OCP sampling and hold operation, the POR
function initiates the Soft Start operation.
Over Current Protection
The overcurrent function protects the converter from a shorted
output by using the upper MOSFET’s on-resistance, rDS(ON),
to monitor the current. This method enhances the converter’s
efficiency and reduces cost by eliminating a current sensing
resistor.
14A
12A
10A
8A
6A
4A
2A
0A
TIME (50µs/DIV.)
FIGURE 1. OVERCURRENT OPERATION
The overcurrent function cycles the soft-start function in a
hiccup mode to provide fault protection. A resistor
(ROCSET) programs the overcurrent trip level (see Typical
Application diagram).
Immediately following POR, the ISL6431 initiates the
Overcurrent Protection sampling and hold operation. First,
the internal error amplifier is disabled. This allows an internal
20µA current sink to develop a voltage across ROCSET. The
ISL6431 then samples this voltage at the COMP pin. This
sampled voltage, which is referenced to the VCC pin, is held
internally as the Overcurrent Set Point.
When the voltage across the upper MOSFET, which is also
referenced to the VCC pin, exceeds the Overcurrent Set
Point, the overcurrent function initiates a soft-start sequence.
Figure 1 shows this operation with an overload condition. This
current is repeated with a 21ms period. Note that the inductor
current increases to over 14A during the Soft Start interval and
causes an overcurrent trip. The converter dissipates very little
power with this method. The measured input power for the
conditions of Figure 1 is only 0.25W.
The overcurrent function will trip at a peak inductor current
(IPEAK) determined by:
IPEAK
=
I--O-----C----S----E----T-----x-----R-----O-----C----S----E----T-
rDS(ON)
where IOCSET is the internal OCSET current source (20µA
typical). The OC trip point varies mainly due to the
MOSFET’s rDS(ON) variations. To avoid overcurrent tripping
in the normal operating load range, find the ROCSET resistor
from the equation above with:
1. The maximum rDS(ON) at the highest junction temperature.
2. The minimum IOCSET from the specification table.
3. Determine IPEAK for
IPEAK
>
IO U T (MA X )
+
(---∆----I---)
2
,
where ∆I is the output inductor ripple current.
For an equation for the ripple current see the section under
component guidelines titled ‘Output Inductor Selection’.
Soft Start
The POR function initiates the soft start sequence after the
overcurrent set point has been sampled. Soft start clamps the
error amplifier output (COMP pin) and reference input (non-
inverting terminal of the error amp) to the internally generated
Soft Start voltage. Figure 2 shows a typical soft start interval.
Initially the clamp on the error amplifier (COMP/OCSET pin)
controls the converter’s output voltage. The oscillator’s
triangular waveform is compared to the ramping error amplifier
voltage. This generates PHASE pulses of increasing width that
charge the output capacitor(s). With sufficient output voltage,
the clamp on the reference input controls the output voltage.
When the internally generated Soft Start voltage exceeds the
feedback (FB pin) voltage, the output voltage is in regulation.
This method provides a rapid and controlled output voltage rise.
VOUT
500mV/DIV.
0V
TIME (1ms/DIV.)
FIGURE 2. SOFT START INTERVAL
Application Guidelines
Layout Considerations
As in any high frequency switching converter, layout is very
important. Switching current from one power device to another
can generate voltage transients across the impedances of the
interconnecting bond wires and circuit traces. These
interconnecting impedances should be minimized by using
wide, short printed circuit traces. The critical components
should be located as close together as possible, using ground
plane construction or single point grounding.
5
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