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PDF ISL6426IR Data sheet ( Hoja de datos )
| Número de pieza | ISL6426IR | |
| Descripción | Single Synchronous Buck Pulse-Width Modulation (PWM) Controller | |
| Fabricantes | Intersil Corporation | |
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Data Sheet
ISL6406, ISL6426
October 2003
FN9073.4
Single Synchronous Buck Pulse-Width
Modulation (PWM) Controller
The ISL6406, ISL6426 is an adjustable frequency,
synchronous buck switching regulator optimized for
generating lower voltages for the distributed DC-DC
architectures. The ISL6406 offers an adjustable output
voltage, while the ISL6426 provides a fixed 1.8V output.
Designed to drive N-Channel MOSFETs in synchronous
buck topology, the ISL6406, ISL6426 integrates the control,
output adjustment and protection functions into a single
package.
The ISL6406, ISL6426 provides simple, single feedback
loop, voltage-mode control with fast transient response. The
output voltage can be precisely regulated to as low as 0.8V.
The error amplifier features a 15MHz gain-bandwidth
product and 6V/µs slew rate which enables high converter
bandwidth for fast transient performance.
Protection from overcurrent conditions is provided by
monitoring the rDS(ON) of the upper MOSFET to inhibit PWM
operation appropriately. This approach simplifies the
implementation and improves efficiency by eliminating the
need for a current sense resistor.
The wide programmable switching frequency range of
100kHz to 700kHz allows the use of small surface mount
inductors and capacitors. The device also provides external
frequency synchronization making it an ideal choice for
DC-DC converter applications.
Ordering Information
TEMP. RANGE
PART NUMBER (oC) PACKAGE PKG. NO.
ISL6406CB
0 to 70
16 Ld SOIC M16.15
ISL6406IB
-40 to 85 16 Ld SOIC M16.15
ISL6406CR
0 to 70
16 Ld QFN
L16.5x5B
ISL6406IR
-40 to 85 16 Ld QFN L16.5x5B
ISL6406CV
0 to 70
16 Ld TSSOP M16.173
ISL6406IV
-40 to 85 16 Ld TSSOP M16.173
ISL6406CVZ (Note)
0 to 70
16 Ld TSSOP M16.173
ISL6406IVZ (Note)
-40 to 85 16 Ld TSSOP M16.173
ISL6426CB
0 to 70
16 Ld SOIC M16.15
ISL6426IB
-40 to 85 16 Ld SOIC M16.15
ISL6426CR
0 to 70
16 Ld QFN
L16.5x5B
ISL6426IR
-40 to 85 16 Ld QFN L16.5x5B
ISL6426CV
0 to 70
16 Ld TSSOP M16.173
ISL6426IV
-40 to 85 16 Ld TSSOP M16.173
Features
• Operates from 3.3V/5V Input
• 0.8V to VIN Output Range
- 0.8V Internal Reference
- ±1.5% Reference Accuracy
• Simple Single-Loop Control Design
- Voltage-Mode PWM Control
• Fast Transient Response
- High-Bandwidth Error Amplifier
• Lossless, Programmable Overcurrent Protection
- Uses Upper MOSFET’s rDS(on)
• Programmable Switching Frequency 100kHz–700kHz
• External Frequency Synchronization
• Two Device Options Available
- ISL6406 . . . . . . . . . . . . . . . . Adjustable Output Voltage
- ISL6426 . . . . . . . . . . . . . . . . . . . . . . Fixed 1.8V Output
• Internal Soft-Start
• QFN Package Option
- QFN Compliant to JEDEC PUB95 MO-220 QFN - Quad
Flat No Leads - Product Outline
- QFN Near Chip Scale Package Footprint; Improves
PCB Efficiency, Thinner in Profile
• Lead Free TSSOP Packaging Available
- Designated with “Z” Suffix (Refer to Note Below)
Applications
• 3V/5V DC-DC Converter Modules
• Distributed DC-DC 3.3V, 2.5V and 1.8V Power
Architectures for DSP, Logic, and Memory
• Power Supplies for Microprocessors
- PCs
- Embedded Controllers
• Memory Supplies
• Personal Computer Peripherals
NOTE: “Z” Suffix: These products are packaged in 16 ld TSSOP
packages that are MSL level 1 at 255-260oC peak reflow
temperature, which exceeds the IPC J Std-020B requirements for
MSL level 1. The lead free and green products employ special lead
free material sets including 100% matte tin plate termination finish,
which is compatible with either Sn/Pb or lead free soldering
operations.
Tape and Reel available. Add “-T” suffix for Tape and Reel Packing
Option.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1 page  
ISL6406, ISL6426
Electrical Specifications Recommended operating conditions unless otherwise noted. Refer to Block Diagram and Typical Application
Schematic. VCC = +3.3V. Typical values are at TA = 25oC. (Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Sync. Frequency Range (Note 6)
1.1 Times the natural switching
frequency.
110 - 770 kHz
Minimum Sync Pulse Width (Note 6)
- 40 100 ns
PWM Maximum Duty Cycle
- 96 - %
GATE DRIVER OUTPUT (Note 6)
Upper Gate Source Current
Upper Gate Sink Current
VBOOT - VPHASE = 5V, VUGATE = 4V
-
-1
-
A
-1-A
Lower Gate Source Current
Lower Gate Sink Current
VVCC = 3.3V, VLGATE = 4V
- -1 - A
-2-A
SOFT-START
Soft-Start Slew Rate
f = 300kHz, TA = 0oC to 70oC
f = 300kHz, TA = -40oC to +85oC
Internal Digital Circuit Clock Count
(Soft-start time varies with frequency)
6.2
6.2
-
6.7
6.7
2048
7.3 ms
7.6 ms
- Clk Cycles
OVERCURRENT
OCSET Current Source
TA = 0oC to 70oC
TA = -40oC to +85oC
NOTES:
5. This is the VCC current consumed when the device is active but not switching.
6. Guaranteed by design.
18 20 22 µA
16 20 23 µA
Typical Performance Curve
0.81
0.805
0.8
0.795
0.79
0.785
0.78
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80
TEMPERATURE (°C)
FIGURE 1. REFERENCE VOLTAGE vs TEMPERATURE
5
5 Page 
ISL6406, ISL6426
100
FZ1
FZ2 FP1 FP2
OPEN LOOP
ERROR AMP GAIN
80
20 log
V----V-O---I-S-N---C--
60
40 COMPENSATION
GAIN
20
0
-20
20
log
RR-----21--
MODULATOR
-40
GAIN
FLC FESR
LOOP GAIN
-60
10 100 1K 10K 100K 1M 10M
FREQUENCY (Hz)
FIGURE 8. ASYMPTOTIC BODE PLOT OF CONVERTER GAIN
Component Selection Guidelines
Charge Pump Capacitor Selection
A capacitor across pins CT1 and CT2 is required to create
the proper bias voltage for the ISL6406, ISL6426 when
operating the IC from 3.3V. Selecting the proper capacitance
value is important so that the bias current draw and the
current required by the MOSFET gates do not overburden
the capacitor. A conservative approach is presented in the
following equation.
CPUMP = I--B----I--A-V---S-C----C+----(-I--fG--S---A-)--T----E--(1.5)
Output Capacitor Selection
An output capacitor is required to filter the output and supply
the load transient current. The filtering requirements are a
function of the switching frequency and the ripple current.
The load transient requirements are a function of the slew
rate (di/dt) and the magnitude of the transient load current.
These requirements are generally met with a mix of
capacitors and careful layout.
Modern digital ICs can produce high transient load slew
rates. High-frequency capacitors initially supply the transient
and slow the current load rate seen by the bulk capacitors.
The bulk filter capacitor values are generally determined by
the ESR (Effective Series Resistance) and voltage rating
requirements rather than actual capacitance requirements.
High-frequency decoupling capacitors should be placed as
close to the power pins of the load as physically possible. Be
careful not to add inductance in the circuit board wiring that
could cancel the usefulness of these low inductance
components. Consult with the manufacturer of the load on
specific decoupling requirements. Use only specialized
low-ESR capacitors intended for switching-regulator
applications for the bulk capacitors. The bulk capacitor’s
ESR will determine the output ripple voltage and the initial
voltage drop after a high slew-rate transient. An aluminum
electrolytic capacitor’s ESR value is related to the case size
with lower ESR available in larger case sizes. However, the
Equivalent Series Inductance (ESL) of these capacitors
increases with case size and can reduce the usefulness of
the capacitor to high slew-rate transient loading.
Unfortunately, ESL is not a specified parameter. Work with
your capacitor supplier and measure the capacitor’s
impedance with frequency to select a suitable component. In
most cases, multiple electrolytic capacitors of small case
size perform better than a single large case capacitor.
Output Inductor Selection
The output inductor is selected to meet the output voltage
ripple requirements and minimize the converter’s response
time to the load transient. The inductor value determines the
converter’s ripple current and the ripple voltage is a function
of the ripple current. The ripple voltage and current are
approximated by the following equations:
∆I =
VIN - VOUT
fs x L
x
VOUT
VIN
∆VOUT = ∆I x ESR
Increasing the value of inductance reduces the ripple current
and voltage. However, the large inductance values reduce
the converter’s response time to a load transient.
One of the parameters limiting the converter’s response to
a load transient is the time required to change the inductor
current. Given a sufficiently fast control loop design, the
ISL6406, ISL6426 will provide either 0% or 100% duty
cycle in response to a load transient. The response time is
the time required to slew the inductor current from an initial
current value to the transient current level. During this
interval the difference between the inductor current and the
transient current level must be supplied by the output
capacitor. Minimizing the response time can minimize the
output capacitance required.
The response time to a transient is different for the
application of load and the removal of load. The following
equations give the approximate response time interval for
application and removal of a transient load:
tRISE =
L x ITRAN
VIN - VOUT
tFALL =
L x ITRAN
VOUT
where: ITRAN is the transient load current step, tRISE is the
response time to the application of load, and tFALL is the
response time to the removal of load. The worst case
response time can be either at the application or removal of
load. Be sure to check both of these equations at the
minimum and maximum output levels for the worst case
response time.
Input Capacitor Selection
Use a mix of input bypass capacitors to control the voltage
overshoot across the MOSFETs. Use small ceramic
11
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| PDF Descargar | [ Datasheet ISL6426IR.PDF ] | |
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