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PDF ISL43681 Data sheet ( Hoja de datos )
| Número de pieza | ISL43681 | |
| Descripción | Low-Voltage/ Single and Dual Supply/ 8 to 1 Multiplexer and Differential 4 to 1 Multiplexer | |
| Fabricantes | Intersil Corporation | |
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®
Data Sheet
ISL43681, ISL43741
September 2003
FN6053
Low-Voltage, Single and Dual Supply,
8 to 1 Multiplexer and Differential 4 to 1
Multiplexer
The Intersil ISL43681 and ISL43741 devices are precision,
bidirectional, analog switches configured as an 8 channel and
a differential 4 channel multiplexer/demultiplexer. They are
designed to operate from a single +2V to +12V supply or from
a ±2V to ±6V supplies. The devices have an inhibit and inhibit
bar pin to simultaneously open all signal paths. The devices
also have a latch bar pin to lock in the last switch address.
ON resistance of 39Ω with a ±5V supply and 125Ω with a
+3.3V supply. Each switch can handle rail to rail analog
signals. The off-leakage current is only 0.1nA at +25oC or
2.5nA at +85oC.
All digital inputs have 0.8V to 2.4V logic thresholds, ensuring
TTL/CMOS logic compatibility when using a single 3.3V or
+5V supply or dual ±5V supplies.
The ISL43681 is a single 8 to 1 multiplexer device and the
ISL43741 is a diff 4 to 1 multiplexer device. Table 1
summarizes the performance of these parts.
TABLE 1. FEATURES AT A GLANCE
CONFIGURATION
SINGLE 8:1 MUX,
DIFF 4:1 MUX
±5V RON
±5V tON/tOFF
12V RON
12V tON/tOFF
5V RON
5V tON/tOFF
3.3V RON
3.3V tON/tOFF
Package
39Ω
32ns/18ns
32Ω
23ns/15ns
65Ω
38ns/19ns
125Ω
70ns/32ns
20 Ld 4x4 QFN
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
• Application Note AN557 “Recommended Test Procedures
for Analog Switches”
• Application Note AN520 “CMOS Analog Multiplexers and
Switches; Specifications and Application Considerations.”
• Application Note AN1034 “Analog Switch and Multiplexer
Applications”
Features
• Fully Specified at 3.3V, 5V, ±5V, and 12V Supplies for
10% Tolerances
• ON Resistance (RON) Max, VS = ±4.5V. . . . . . . . . . . 50Ω
• ON Resistance (RON) Max, VS = +3V . . . . . . . . . . . 155Ω
• RON Matching Between Channels, VS = ±5V. . . . . . . . . <2Ω
• Low Charge Injection, VS = ±5V . . . . . . . . . . . . . 1pC (Max)
• Single Supply Operation. . . . . . . . . . . . . . . . . . . +2V to +12V
• Dual Supply Operation . . . . . . . . . . . . . . . . . . . . . ±2V to ±6V
• Fast Switching Action (VS = +5V)
- tON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38ns
- tOFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19ns
• Guaranteed Max Off-leakage . . . . . . . . . . . . . . . . . . . 2.5nA
• Guaranteed Break-Before-Make
• TTL, CMOS Compatible
Applications
• Battery Powered, Handheld, and Portable Equipment
• Communications Systems
- Radios
- Telecom Infrastructure
- ADSL, VDSL Modems
• Test Equipment
- Medical Ultrasound
- Magnetic Resonance Image
- CT and PET Scanners (MRI)
- ATE
- Electrocardiograph
• Audio and Video Signal Routing
• Various Circuits
- +3V/+5V DACs and ADCs
- Sample and Hold Circuits
- Operational Amplifier Gain Switching Networks
- High Frequency Analog Switching
- High Speed Multiplexing
- Integrator Reset Circuits
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved.
1 page  
ISL43681, ISL43741
Electrical Specifications +12V Supply
Test Conditions: V+ = +10.8V to +13.2V, GND = 0V, VINH = 4V, VINL = 0.8V (Note 3),
Unless Otherwise Specified
PARAMETER
TEST CONDITIONS
TEMP (NOTE 4)
(oC)
MIN
(NOTE 4)
TYP MAX UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
ON Resistance, RON
V+ = 10.8V, ICOM = 1.0mA, VNO or VNC = 9V
(See Figure 6)
Full 0
25 -
Full -
- V+ V
37 45 Ω
- 55 Ω
RON Matching Between Channels, V+ = 10.8V, ICOM = 1.0mA, VNO or VNC = 9V (Note 5) 25 - 1.2 2 Ω
∆RON
Full - - 2 Ω
RON Flatness, RFLAT(ON)
V+ = 10.8V, ICOM = 1.0mA, VNO or VNC = 3V, 6V, 9V 25
-
5
7Ω
(Note 6)
Full - - 7 Ω
NO or NC OFF Leakage Current, V+ = 13.2V, VCOM = 1V, 12V, VNO or VNC = 12V, 1V
25
-0.1 0.002 0.1 nA
INO(OFF) or INC(OFF)
(Note 7)
Full -2.5
-
2.5 nA
COM OFF Leakage Current,
ICOM(OFF)
V+ = 13.2V, VCOM = 12V, 1V, VNO or VNC = 1V, 12V
25
-0.1 0.002 0.1 nA
(Note 7)
Full -2.5
-
2.5 nA
COM ON Leakage Current,
ICOM(ON)
V+ = 13.2V, VCOM = 1V, 12V, VNO or VNC = 1V, 12V, 25
-0.1 0.002 0.1 nA
or floating (Note 7)
Full -2.5
-
2.5 nA
DIGITAL INPUT CHARACTERISTICS
Input Voltage High, VINH, VADDH
Input Voltage Low, VINL, VADDL
Input Current, IADDH, IADDL, IENH, V+ = 13.2V, VINH, VADD = 0V or V+
IENL
Input Current, IENH, ILEH
V+ = 13.2V, VINH, VADD = 0V or V+
Input Current, IENL, ILEL
V+ = 13.2V, VINH, VADD = 0V or V+
DYNAMIC CHARACTERISTICS
Full 3.7
Full -
Full -0.5
Full -1.5
Full -4
3.3
2.7
-
-
-
-V
0.8 V
0.5 µA
1.5 µA
4 µA
Enable Turn-ON Time, tON
V+ = 10.8V, VNO or VNC = 10V, RL = 300Ω, CL = 35pF,
VIN = 0 to 4 (See Figure 1)
25
Full
-
-
24 40 ns
- 45 ns
Enable Turn-OFF Time, tOFF
V+ = 10.8V, VNO or VNC = 10V, RL = 300Ω, CL = 35pF,
VIN = 0 to 4 (See Figure 1)
25
Full
-
-
15 30 ns
- 35 ns
Address Transition Time, tTRANS
V+ = 10.8V, VNO or VNC = 10V, RL = 300Ω, CL = 35pF,
VIN = 0 to 4 (See Figure 1)
25
Full
-
-
27 50 ns
- 55 ns
Break-Before-Make Time Delay, tD
Latch Setup Time, tS
V+ = 13.2V, RL = 300Ω, CL = 35pF, VNO or VNC = 10V,
VIN = 0 to 4 (See Figure 3)
(See Figure 4)
Full
25
Full
2
25
35
5
-
-
- ns
- ns
- ns
Latch Hold Time, tH
(See Figure 4)
25 0 - - ns
Full 0 - - ns
Latch Pulse Width, tWPW
(See Figure 4)
25 15
Full 25
-
-
- ns
- ns
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0Ω (See Figure 2)
25 - 2.7 5 pC
5
5 Page 
ISL43681, ISL43741
Test Circuits and Waveforms (Continued)
LOGIC
INPUT
3V
0V
SWITCH
OUTPUT
VOUT
0V
tr < 20ns
tf < 20ns
tBBM
80%
C
V+
LOGIC
INPUT
C
V+
LOGIC
INPUT
V+
C
V-
C
EN, LE
NO0-NO7
ADDA-C
COM
ISL43681
GND EN
VOUT
RL
300Ω
CL
35pF
V+
C
V-
C
EN, LE
COMx
NO0x-NO3x
ISL43741
ADDA-B
GND EN
VOUT
RL
300Ω
CL
35pF
Repeat test for other switches. CL includes fixture and stray
capacitance.
FIGURE 3A. tBBM MEASUREMENT POINTS
FIGURE 3B. tBBM TEST CIRCUIT
FIGURE 3. BREAK-BEFORE-MAKE TIME
11
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet ISL43681.PDF ] | |
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