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PDF ISL43485 Data sheet ( Hoja de datos )

Número de pieza ISL43485
Descripción 3.3V/ Low Power/ 30Mbps/ RS-485/RS-422
Fabricantes Intersil Corporation 
Logotipo Intersil Corporation Logotipo



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®
Data Sheet
January 2004
ISL43485
FN6071
3.3V, Low Power, 30Mbps, RS-485/RS-422
Transceiver
The Intersil ISL43485 is a high speed BiCMOS 3.3V
powered, single transceiver that meets both the RS-485 and
RS-422 standards for balanced communication. Unlike
some competitive devices, this Intersil transceiver is
specified for 10% tolerance supplies (3V to 3.6V).
Data rates up to 30Mbps are achievable by using this
transceiver, which features higher slew rates.
Logic inputs (e.g., DI and DE) accept signals in excess of
5.5V, making them compatible with 5V logic families.
Receiver (Rx) inputs feature a “fail-safe if open” design,
which ensures a logic high output if Rx inputs are floating,
and the ISL43485 presents a “single unit load” to the RS-485
bus, which allows up to 32 transceivers on the network.
Driver (Tx) outputs are short circuit protected, even for
voltages exceeding the power supply voltage. Additionally,
on-chip thermal shutdown circuitry disables the Tx outputs to
prevent damage if power dissipation becomes excessive.
Pinout
ISL43485 (SOIC)
TOP VIEW
RO 1
RE 2
DE 3
DI 4
R
D
8 VCC
7 B/Z
6 A/Y
5 GND
Features
• High Data Rate. . . . . . . . . . . . . . . . . . . . . . up to 30Mbps
• Operates from a Single +3.3V Supply (10% Tolerance)
• Interoperable with 5V Logic
• Single Unit Load Allows up to 32 Devices on the Bus
• Low Current Shutdown Mode. . . . . . . . . . . . . . . . . . 15nA
• -7V to +12V Common Mode Input Voltage Range
• Three State Rx and Tx Outputs
• 10ns Propagation Delay, 1ns Skew
• Half Duplex Pinout
• Current Limiting and Thermal Shutdown for driver
Overload Protection
Applications
• SCSI “Fast 20” Drivers and Receivers
• Factory Automation
• Data Loggers
• Security Networks
• Building Environmental Control Systems
• Industrial/Process Control Networks
• Level Translators
Ordering Information
PART NO.
(BRAND)
ISL43485IB
(43485IB)
TEMP.
RANGE (°C)
PACKAGE
-40 to 85 8 Ld SOIC
ISL43485IB-T
(43485IB)
-40 to 85 8 Ld SOIC
Tape and Reel
PKG. DWG. #
M8.15
M8.15
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2004. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

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ISL43485 pdf
ISL43485
Electrical Specifications Test Conditions: VCC = 3V to 3.6V; Unless Otherwise Specified. Typicals are at VCC = 3.3V, TA = 25°C,
Note 2 (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
TEMP
(°C) MIN
TYP MAX UNITS
Time to Shutdown
tSHDN (Note 7)
Receiver Enable from Shutdown to tZH(SHDN) RL = 1k, CL = 15pF, SW = GND (Figure 5),
Output High
(Notes 7, 9)
Full 80
Full -
190 300 ns
240 400 ns
Receiver Enable from Shutdown to tZL(SHDN) RL = 1k, CL = 15pF, SW = VCC (Figure 5),
Output Low
(Notes 7, 9)
Full -
240 400 ns
NOTES:
2. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless
otherwise specified.
3. Supply current specification is valid for loaded drivers when DE = 0V.
4. Applies to peak current. See “Typical Performance Curves” for more information.
5. When testing this parameter, keep RE = 0 to prevent the device from entering SHDN.
6. When testing this parameter, the RE signal high time must be short enough (typically <100ns) to prevent the device from entering SHDN.
7. The ISL43485 is put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 80ns, the parts are guaranteed
not to enter shutdown. If the inputs are in this state for at least 300ns, the parts are guaranteed to have entered shutdown. See “Low-Power
Shutdown Mode” section.
8. Keep RE = VCC, and set the DE signal low time >300ns to ensure that the device enters SHDN.
9. Set the RE signal high time >300ns to ensure that the device enters SHDN.
Test Circuits and Waveforms
VCC
DE
DI
Z
D
Y
VOD
RL/2
RL/2 VOC
VCC
DE
DI
Z
D
Y
VOD
375
RL = 60
VCM
-7V TO +12V
375
FIGURE 1A. VOD AND VOC
FIGURE 1B. VOD WITH COMMON MODE LOAD
FIGURE 1. DC DRIVER TEST CIRCUITS
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ISL43485 arduino
ISL43485
Small Outline Plastic Packages (SOIC)
N
INDEX
AREA
E
-B-
H
0.25(0.010) M B M
123
-A-
D
SEATING PLANE
A
L
h x 45o
-C-
e A1
B
0.25(0.010) M C A M B S
µα
0.10(0.004)
C
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Inter-
lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
M8.15 (JEDEC MS-012-AA ISSUE C)
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC
PACKAGE
INCHES
MILLIMETERS
SYMBOL MIN MAX MIN MAX NOTES
A
0.0532 0.0688 1.35
1.75
-
A1
0.0040 0.0098 0.10
0.25
-
B
0.013 0.020 0.33
0.51
9
C
0.0075 0.0098 0.19
0.25
-
D
0.1890 0.1968 4.80
5.00
3
E
0.1497 0.1574 3.80
4.00
4
e 0.050 BSC 1.27 BSC -
H
0.2284 0.2440 5.80
6.20
-
h
0.0099 0.0196 0.25
0.50
5
L
0.016 0.050 0.40
1.27
6
N8
87
α 0o 8o 0o 8o -
Rev. 0 12/93
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
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