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PDF ISL43231IR Data sheet ( Hoja de datos )
| Número de pieza | ISL43231IR | |
| Descripción | Low-Voltage/ Single and Dual Supply/ Triple SPDT Analog Switch | |
| Fabricantes | Intersil Corporation | |
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®
Data Sheet
September 2003
ISL43231
FN6054
Low-Voltage, Single and Dual Supply,
Triple SPDT Analog Switch
The Intersil ISL43231 device is a precision, bidirectional,
analog switches configured as a a triple single pole/double
throw (SPDT) switch, designed to operate from a single +2V
to +12V supply or from a ±2V to ±6V supply. The device has
an inhibit and inhibit bar pin to simultaneously open all signal
paths. The device also has a latch bar pin to lock in the last
switch address.
ON resistance of 39Ω with a ±5V supply and 125Ω with a
+3.3V supply. Each switch can handle rail to rail analog
signals. The off-leakage current is only 0.1nA at +25oC or
2.5nA at +85oC.
All digital inputs have 0.8V to 2.4V logic thresholds, ensuring
TTL/CMOS logic compatibility when using a single +3.3V or
+5V supply or dual ±5V supplies.
The ISL43231 is a committed triple SPDT, which is perfect for
use in 2-to-1 multiplexer applications. Table 1 summarizes the
performance of this part.
TABLE 1. FEATURES AT A GLANCE
CONFIGURATION
±5V RON
±5V tON/tOFF
12V RON
12V tON/tOFF
5V RON
5V tON/tOFF
3.3V RON
3.3V tON/tOFF
Package
TRIPLE SPDT
39Ω
32ns/18ns
32Ω
23ns/15ns
65Ω
38ns/19ns
125Ω
70ns/32ns
20 Ld 4x4 QFN
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
• Application Note AN557 “Recommended Test Procedures
for Analog Switches”
• Application Note AN520 “CMOS Analog Multiplexers and
Switches; Specifications and Application Considerations.”
• Application Note AN1034 “Analog Switch and Multiplexer
Applications”
Features
• Fully Specified at 3.3V, 5V, ±5V, and 12V Supplies for 10%
Tolerances
• ON Resistance (RON) Max, VS = ±4.5V. . . . . . . . . . . 50Ω
• ON Resistance (RON) Max, VS = +3V . . . . . . . . . . . 155Ω
• RON Matching Between Channels, VS = ±5V. . . . . . . . . <2Ω
• Low Charge Injection, VS = ±5V . . . . . . . . . . . . . 1pC (Max)
• Single Supply Operation. . . . . . . . . . . . . . . . . . . +2V to +12V
• Dual Supply Operation . . . . . . . . . . . . . . . . . . . . . ±2V to ±6V
• Fast Switching Action (VS = +5V)
- tON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38ns
- tOFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19ns
• Guaranteed Max Off-leakage . . . . . . . . . . . . . . . . . . . 2.5nA
• Guaranteed Break-Before-Make
• TTL, CMOS Compatible
Applications
• Battery Powered, Handheld, and Portable Equipment
• Communications Systems
- Radios
- Telecom Infrastructure
- ADSL, VDSL Modems
• Test Equipment
- Medical Ultrasound
- Magnetic Resonance Image
- CT and PET Scanners (MRI)
- ATE
- Electrocardiograph
• Audio and Video Signal Routing
• Various Circuits
- +3V/+5V DACs and ADCs
- Sample and Hold Circuits
- Operational Amplifier Gain Switching Networks
- High Frequency Analog Switching
- High Speed Multiplexing
- Integrator Reset Circuits
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved
1 page  
ISL43231
Electrical Specifications +12V Supply
Test Conditions: V+ = +10.8V to +13.2V, GND = 0V, VINH = 4V, VINL = 0.8V (Note 3),
Unless Otherwise Specified (Continued)
PARAMETER
TEST CONDITIONS
TEMP (NOTE 4)
(oC)
MIN
(NOTE 4)
TYP MAX UNITS
ON Resistance, RON
V+ = 10.8V, ICOM = 1.0mA, VNO or VNC = 9V
(See Figure 6)
25 -
Full -
37 45 Ω
- 55 Ω
RON Matching Between Channels, V+ = 10.8V, ICOM = 1.0mA, VNO or VNC = 9V (Note 5)
25
-
1.2
2Ω
∆RON
Full - - 2 Ω
RON Flatness, RFLAT(ON)
V+ = 10.8V, ICOM = 1.0mA, VNO or VNC = 3V, 6V, 9V 25
-
5
7Ω
(Note 6)
Full - - 7 Ω
NO or NC OFF Leakage Current, V+ = 13.2V, VCOM = 1V, 12V, VNO or VNC = 12V, 1V 25 -0.1 0.002 0.1 nA
INO(OFF) or INC(OFF)
(Note 7)
Full -2.5
-
2.5 nA
COM OFF Leakage Current,
ICOM(OFF)
V+ = 13.2V, VCOM = 12V, 1V, VNO or VNC = 1V, 12V 25 -0.1 0.002 0.1 nA
(Note 7)
Full -2.5
-
2.5 nA
COM ON Leakage Current,
ICOM(ON)
V+ = 13.2V, VCOM = 1V, 12V, VNO or VNC = 1V, 12V, 25
-0.1 0.002 0.1 nA
or floating (Note 7)
Full -2.5
-
2.5 nA
DIGITAL INPUT CHARACTERISTICS
Input Voltage High, VINH, VADDH
Input Voltage Low, VINL, VADDL
Input Current, IADDH, IADDL, IENH, V+ = 13.2V, VINH, VADD = 0V or V+
IENL
Input Current, IENH, ILEH
V+ = 13.2V, VINH, VADD = 0V or V+
Input Current, IENL, ILEL
V+ = 13.2V, VINH, VADD = 0V or V+
DYNAMIC CHARACTERISTICS
Full 3.7
Full -
Full -0.5
Full -1.5
Full -4
3.3
2.7
-
-
-
-V
0.8 V
0.5 µA
1.5 µA
4 µA
Enable Turn-ON Time, tON
V+ = 10.8V, VNO or VNC = 10V, RL =300Ω, CL = 35pF,
VIN = 0 to 4 (See Figure 1)
25
Full
-
-
24 40 ns
45 ns
Enable Turn-OFF Time, tOFF
V+ = 10.8V, VNO or VNC = 10V, RL =300Ω, CL = 35pF,
VIN = 0 to 4 (See Figure 1)
25
Full
-
-
15 30 ns
35 ns
Address Transition Time, tTRANS
V+ = 10.8V, VNO or VNC = 10V, RL =300Ω, CL = 35pF,
VIN = 0 to 4 (See Figure 1)
25
Full
-
-
27 50 ns
- 55 ns
Break-Before-Make Time Delay, tD
Latch Setup Time, tS
V+ = 13.2V, RL = 300Ω, CL = 35pF, VNO or VNC = 10V,
VIN = 0 to 4 (See Figure 3)
(See Figure 4)
Full
25
Full
2
25
35
5
-
-
- ns
- ns
- ns
Latch Hold Time, tH
(See Figure 4)
25 0 - - ns
Full 0 - - ns
Latch Pulse Width, tWPW
(See Figure 4)
25 15
Full 25
-
-
- ns
- ns
Charge Injection, Q
OFF Isolation
Crosstalk, Note 8
CL = 1.0nF, VG = 0V, RG = 0Ω (See Figure 2)
25 - 2.7 5 pC
RL = 50Ω, CL = 15pF, f = 100kHz,
25 - 92 - dB
VNOx or VNCx= 1VRMS (See Figures 5, 7 and 20) 25 - <-110 - dB
All Hostile Crosstalk, Note 8
25
-
-105
1.5 dB
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 8)
25
-
3
- pF
5
5 Page 
ISL43231
Test Circuits and Waveforms (Continued)
V+
C
V-
C
SIGNAL
GENERATOR
EN, LE
NOA or NCA
COMA
ADDX
0V or V+
ANALYZER
RL
COMB
NOB or NCB
GND EN
50Ω
N.C.
IMPEDANCE
ANALYZER
V+
C
V-
C
EN, LE
NO or NC
0V or V+
ADDX
COM
GND EN
FIGURE 7. CROSSTALK TEST CIRCUIT
Detailed Description
The ISL43231 analog switch offers a precise switching
capability from a bipolar ±2V to ±6V or a single 2V to 12V
supply with low on-resistance (39Ω) and high speed
operation (tON = 38ns, tOFF = 19ns) with dual 5V supplies.
It has an inhibit and inhibit bar pin to simultaneously open all
signal paths. It also has a latch bar pin to lock in the last
switch address.
The device is especially well suited for applications using
±5V supplies. With ±5V supplies the performance (RON,
Leakage, Charge Injection, etc.) is best in class.
High frequency applications also benefit from the wide
bandwidth, and the very high off isolation and crosstalk
rejection.
Supply Sequencing And Overvoltage Protection
With any CMOS device, proper power supply sequencing is
required to protect the device from excessive input currents
which might permanently damage the IC. All I/O pins contain
ESD protection diodes from the pin to V+ and to V- (see
Figure 9). To prevent forward biasing these diodes, V+ and
V- must be applied before any input signals, and input signal
voltages must remain between V+ and V-. If these conditions
cannot be guaranteed, then one of the following two
protection methods should be employed.
Logic inputs can easily be protected by adding a 1kΩ
resistor in series with the input (see Figure 9). The resistor
limits the input current below the threshold that produces
permanent damage, and the sub-microamp input current
produces an insignificant voltage drop during normal
operation.
This method is not applicable for the signal path inputs.
Adding a series resistor to the switch input defeats the
purpose of using a low RON switch, so two small signal
11
FIGURE 8. CAPACITANCE TEST CIRCUIT
diodes can be added in series with the supply pins to provide
overvoltage protection for all pins (see Figure 9). These
additional diodes limit the analog signal from 1V below V+ to
1V above V-. The low leakage current performance is
unaffected by this approach, but the switch resistance may
increase, especially at low supply voltages.
OPTIONAL
PROTECTION
RESISTOR
FOR LOGIC
INPUTS
1kΩ LOGIC
VNO or NC
OPTIONAL PROTECTION
DIODE
V+
VCOM
V-
OPTIONAL PROTECTION
DIODE
FIGURE 9. INPUT OVERVOLTAGE PROTECTION
Power-Supply Considerations
The ISL43231 construction is typical of most CMOS analog
switches, in that they have three supply pins: V+, V-, and
GND. V+ and V- drive the internal CMOS switches and set
their analog voltage limits, so there are no connections
between the analog signal path and GND. Unlike switches
with a 13V maximum supply voltage, the ISL43231 15V
maximum supply voltage provides plenty of room for the
10% tolerance of 12V supplies (±6V or 12V single supply),
as well as room for overshoot and noise spikes.
This switch device performs equally well when operated with
bipolar or single voltage supplies.The minimum
recommended supply voltage is 2V or ±2V. It is important to
11 Page | ||
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