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ISD1000A の電気的特性と機能

ISD1000AのメーカーはETCです、この部品の機能は「Single-Chip Voice Record/Playback Devices 16- and 20-Second Durations」です。


製品の詳細 ( Datasheet PDF )

部品番号 ISD1000A
部品説明 Single-Chip Voice Record/Playback Devices 16- and 20-Second Durations
メーカ ETC
ロゴ ETC ロゴ 




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ISD1000A Datasheet, ISD1000A PDF,ピン配置, 機能
®
ISD1000A Series
Single-Chip Voice Record/Playback Devices
16- and 20-Second Durations
FEATURES
• Easy-to-use single-chip voice Record/Play-
back solution
• High-quality, natural voice/audio
reproduction
• Manual switch or microcontroller compatible
– Playback can be edge- or level-
activated
• Single-chip durations of 16 and 20 seconds
• Directly cascadable for longer durations
• Power-down mode
– 1 µA standby current (typical)
• Zero-power message storage
– Eliminates battery backup circuits
• Fully addressable to handle multiple
messages
• 100-year message retention (typical)
• 100,000 record cycles (typical)
• On-chip clock source
• No algorithm development required
• Single +5 volt supply
• Available in die form, DIP, and SOIC
packaging
• Industrial temperature (-40°C to +85°C)
version available
1
ISD1000A SERIES SUMMARY
Part
Number
ISD1016A
ISD1020A
Duration
(Seconds)
16
20
Input Sample
Rate (KHz)
8
6.4
Typical Filter
Pass Band
(KHz)
3.4
2.7
Information Storage Devices, Inc.
1–1

1 Page





ISD1000A pdf, ピン配列
Product Data Sheets
ISD1000A Series
ISD1000A SERIES PINOUTS
M0/A0
M1/A1
M2/A2
M3/A3
M4/A4
M5/A5
NC
NC
A6
A7
AUX IN
VSSD
VSSA
SP+
1 28
2 27
3 26
4 25
5 24
6 23
7 22
8 21
9 20
10 19
11 18
12 17
13 16
14 15
DIP/SOIC
VCCD
P/R
XCLK
EOM
PD
CE
NC
ANA OUT
ANA IN
AGC
MIC REF
MIC
VCCA
SP–
to achieve longer recording durations. The non-
volatile storage array is based on production-
proven, low-power CMOS EEPROM technology.
The highly integrated ISD1000A Series contains
all the basic functions required for high-quality
voice Recording and Playback. The noise-cancel-
ling Microphone Preamplifier and Automatic Gain
Control (AGC) record both low-volume and high-
volume sounds. The AGC attack and release
times are adjusted by an external resistor and
capacitor. Antialiasing is performed by a continu-
ous fifth-order Chebyshev filter, requiring no exter-
nal components or clocks to give toll-quality
reproduction. The low corner of the passband is
user-settable by two external capacitors. The
devices contain their own temperature-stabilized
timebase oscillator.
The ISD1000A devices drive a speaker directly
through differential outputs. This boosts power by
four times and eliminates the need for a series
capacitor or an output amplifier. The device will
operate from a single power supply or from batter-
ies. The device also includes a power down func-
tion for applications where minimum power
consumption is critical. The CMOS-based design,
combined with the nonvolatile storage array,
assures the lowest possible overall power con-
sumption.
On-chip control functions make the ISD1000A
Series very easy to use in a wide array of applica-
tions. Each device offers a variety of operating
modes and interface options. The devices may be
used in applications that require little more than a
few switches and a battery. The devices may also
be integrated into electronic systems where digital
addresses can be provided for more sophisti-
cated message addressing and control. The
ISD1000A array is organized into 160 segments.
Addresses A0 through A7 provide access to each
segment in the array for message addressing.
Addressing provides the capability of construct-
ing messages by combining stored phrases and
sounds.
PIN DESCRIPTIONS
1
Voltage Inputs (VCCA, VCCD)
To minimize noise, the analog and digital circuits
in the ISD1000A Series devices use separate
power busses. These voltage busses are brought
out to separate pins and should be tied together
as close to the supply as possible. In addition,
these supplies should be decoupled as close to
the package as possible.
Ground Inputs (VSSA, VSSD)
The ISD1000A Series of devices utilizes separate
analog and digital ground busses. These pins
should be tied together as close to the package
as possible and connected through a low-imped-
ance path to power supply ground.
Power Down Input (PD)
When not recording or playing back, the PD pin
should be pulled HIGH to place the part in a very
low power mode (see ISB specification). When
EOM pulses LOW for an overflow condition, PD
should be brought HIGH to reset the address
pointer back to the beginning of the Record/Play-
back space.
1–3


3Pages


ISD1000A 電子部品, 半導体
ISD1000A Series
Product Data Sheets
A6 or A7 = LOW) and 2. ISD1000A Series Opera-
tional Mode Options (A6 AND A7 = HIGH).
Operational mode options are shown in the Oper-
ational Modes table. There are a maximum of 160
message addresses (or segments). Each seg-
ment corresponds to one of 160 rows in the ana-
log storage array. The message addresses
(segments) are in locations 0 through 159 contig-
uous. The playback/record duration of each seg-
ment depends upon the device and is as follows:
Part
Number
Segment Playback/Record
Duration
ISD1016A
100 milliseconds
ISD1020A
-1
125 milliseconds
An operation may be started at any address, as
defined by address pins A0-A7. Record or play-
back continues with automatic incrementing of the
internal on-chip address until either CE is brought
HIGH (Record), an end of message marker is
encountered (Playback with CE HIGH), or an over-
flow (device full) condition results.
OPERATIONAL MODES
The ISD1000A Series is designed with several
built-in operational modes provided to allow max-
imum functionality with a minimum of additional
components, described in detail below. The oper-
ational modes use the address pins on the
ISD1000A devices, but are mapped outside the
valid address range. When the two Most Signifi-
cant Bits (MSBs) are HIGH (A6 = A7=1), the
remaining address signals are interpreted as
mode bits and NOT as address bits. Therefore,
operational modes and direct addressing are not
compatible and cannot be used simultaneously.
There are two important considerations for using
operational modes. First, all operations begin ini-
tially at address 0, which is the beginning of the
ISD1000A address space. Later operations can
begin at other address locations, depending on
the operational mode(s) chosen. In addition, the
address pointer is reset to 0 when the device is
changed from Record to Playback, or when a
Power-Down cycle is executed.
Second, an Operational Mode is executed when
CE goes LOW and the two MSBs are HIGH. This
Operational Mode remains in effect until the next
OPERATIONAL MODES TABLE
Control
Mode
M0
M1
M2
M3
M4
M5
Function
Message cueing
Delete EOM markers
Cascading
Looping
Consecutive addressing
CE level-activated
Typical Use
Jointly Compatible*
Fast-forward through messages
Position EOM marker at the end of the last
message
Adding devices to extend message
Continuous playback from Address 0
Record/Play multiple consecutive mes-
sages
Allow message pausing
M4, M5
M3, M4, M5
M1, M5
M0, M1, M5
M0, M1, M3, M4
NOTE: An asterisk (*) indicates additional operational modes which can be used simultaneously with the given mode.
1–6

6 Page



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共有リンク

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部品番号部品説明メーカ
ISD1000A

Single-Chip Voice Record/Playback Devices 16- and 20-Second Durations

ETC
ETC
ISD1000A

ISD1000A Series / Voice Record / Playback Devides / 16 and 20 Second Durations

Winbond Electronics
Winbond Electronics


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