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PDF IW4013BD Data sheet ( Hoja de datos )
| Número de pieza | IW4013BD | |
| Descripción | Dual D Flip-Flop High-Voltage Silicon-Gate CMOS | |
| Fabricantes | ETC | |
| Logotipo |  |
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TECHNICAL DATA
Dual D Flip-Flop
High-Voltage Silicon-Gate CMOS
IW4013B
The IW4013B consists of two identical, independent data-type flip-
flops. Each flip-flop has independent data, set, reset, and clock inputs
and Q and Q outputs. These devices can be used for shift register
applications, and, by connecting Q output to the data input, for counter
and toggle applications. The logic level present at the D input is
transferred to the Q output during the positive-going transition of the
clock pulse. Setting or resetting is independent of the clock and is
accomplished by a high level on the set or reset line, respectively.
• Operating Voltage Range: 3.0 to 18 V
• Maximum input current of 1 µA at 18 V over full package-
temperature range; 100 nA at 18 V and 25°C
• Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
ORDERING INFORMATION
IW4013BN Plastic
IW4013BD SOIC
TA = -55° to 125° C for all packages
LOGIC DIAGRAM
PIN ASSIGNMENT
PIN 14 =VCC
PIN 7 = GND
FUNCTION TABLE
Inputs
Clock Data Reset Set
L LL
H LL
X LL
X X HL
X X LH
X X HH
Outputs
QQ
LH
HL
QQ
LH
HL
HH
X = don’t care
19
1 page  
IW4013B
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms
Figure 3. Switching Waveforms
EXPANDED LOGIC DIAGRAM
(1/2 of the Device)
23
5 Page | ||
| Páginas | Total 5 Páginas | |
| PDF Descargar | [ Datasheet IW4013BD.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| IW4013B | Dual D Flip-Flop High-Voltage Silicon-Gate CMOS | ETC |
| IW4013B | Dual D-Type Flip-Flop |  IK Semiconductor |
| IW4013BD | Dual D Flip-Flop High-Voltage Silicon-Gate CMOS | ETC |
| IW4013BN | Dual D Flip-Flop High-Voltage Silicon-Gate CMOS | ETC |
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