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PDF ISP1582BS Data sheet ( Hoja de datos )
| Número de pieza | ISP1582BS | |
| Descripción | Hi-Speed Universal Serial Bus peripheral controller | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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ISP1582
Hi-Speed Universal Serial Bus peripheral controller
Rev. 03 — 25 August 2004
Preliminary data
1. General description
The ISP1582 is a cost-optimized and feature-optimized Hi-Speed Universal Serial
Bus (USB) peripheral controller. It fully complies with Universal Serial Bus
Specification Rev. 2.0, supporting data transfer at high-speed (480 Mbit/s) and
full-speed (12 Mbit/s).
The ISP1582 provides high-speed USB communication capacity to systems based
on microcontrollers or microprocessors. It communicates with a microcontroller or
microprocessor of a system through a high-speed general-purpose parallel interface.
The ISP1582 supports automatic detection of Hi-Speed USB system operation.
Original USB fall-back mode allows the device to remain operational under full-speed
conditions. It is designed as a generic USB peripheral controller so that it can fit into
all existing device classes, such as imaging class, mass storage devices,
communication devices, printing devices and human interface devices.
The internal generic Direct Memory Access (DMA) block allows easy integration into
data streaming applications.
The modular approach to implementing a USB peripheral controller allows the
designer to select the optimum system microcontroller from the wide variety available.
The ability to reuse existing architecture and firmware investments shortens the
development time, eliminates risk and reduces cost. The result is fast and efficient
development of the most cost-effective USB peripheral solution.
The ISP1582 is ideally suited for many types of peripherals, such as: printers,
scanners, digital still cameras, USB-to-Ethernet links, cable and DSL modems. The
low power consumption during suspend mode allows easy design of equipment that
is compliant to the ACPI™, OnNow™ and USB power management requirements.
The ISP1582 also incorporates features such as SoftConnect™, a reduced
frequency crystal oscillator, and integrated termination resistors. These features allow
significant cost savings in system design and easy implementation of advanced USB
functionality into PC peripherals.
1 page  
Philips Semiconductors
7. Pinning information
7.1 Pinning
ISP1582
Hi-Speed USB peripheral controller
AGND 1
RPU 2
DP 3
DM 4
AGND 5
RREF 6
RESET_N 7
EOT 8
DREQ 9
DACK 10
DIOR 11
DIOW 12
DGND 13
INT 14
ISP1582BS
Fig 2. Pin configuration HVQFN56 (top view).
42 DATA10
41 DGND
40 DATA9
39 DATA8
38 DATA7
37 DATA6
36 DATA5
35 DATA4
34 VCC(I/O)
33 DATA3
32 DATA2
31 DATA1
30 DATA0
29 DGND
004aaa536
9397 750 13699
Preliminary data
INT 14
DGND 13
DIOW 12
DIOR 11
DACK 10
DREQ 9
EOT 8
RESET_N 7
RREF 6
AGND 5
DM 4
DP 3
RPU 2
AGND 1
GND (exposed die pad)
ISP1582BS
terminal 1
29 DGND
30 DATA0
31 DATA1
32 DATA2
33 DATA3
34 VCC(I/O)
35 DATA4
36 DATA5
37 DATA6
38 DATA7
39 DATA8
40 DATA9
41 DGND
42 DATA10
Bottom View
Fig 3. Pin configuration HVQFN56 (bottom view).
Rev. 03 — 25 August 2004
004aaa377
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
5 of 66
5 Page 
Philips Semiconductors
ISP1582
Hi-Speed USB peripheral controller
9397 750 13699
Preliminary data
8.2 Hi-Speed USB transceiver
The analog transceiver directly interfaces to the USB cable through integrated
termination resistors. The high-speed transceiver requires an external resistor
(12.0 kΩ ± 1 %) between pin RREF and ground to ensure an accurate current mirror
that generates the Hi-Speed USB current drive. A full-speed transceiver is integrated
as well. This makes the ISP1582 compliant to Hi-Speed USB and Original USB,
supporting both the high-speed and full-speed physical layers. After automatic speed
detection, the Philips Serial Interface Engine (SIE) sets the transceiver to use either
high-speed or full-speed signaling.
8.3 MMU and integrated RAM
The Memory Management Unit (MMU) and the integrated RAM provide the
conversion between the USB speed (full-speed: 12 Mbit/s, high-speed: 480 Mbit/s)
and the microcontroller handler or the DMA handler. The data from the USB bus is
stored in the integrated RAM, which is cleared only when the microcontroller has read
or written all data from or to the corresponding endpoint buffer or when the DMA
handler has read or written all data from or to the endpoint buffer. The OUT endpoint
buffer can also be cleared forcibly by setting bit CLBUF in the Control Function
register. A total of 8 kbytes RAM is available for buffering.
8.4 Microcontroller interface and microcontroller handler
The microcontroller handler allows the external microcontroller or microprocessor to
access the register set in the Philips SIE as well as the DMA handler. The
initialization of the DMA configuration is done through the microcontroller handler.
8.5 OTG SRP module
The OTG supplement defines a Session Request Protocol (SRP), which allows a
B-device to request the A-device to turn on VBUS and start a session. This protocol
allows the A-device, which may be battery-powered, to conserve power by turning off
VBUS when there is no bus activity while still providing a means for the B-device to
initiate bus activity.
Any A-device, including a PC or laptop, can respond to SRP. Any B-device, including
a standard USB peripheral, can initiate SRP.
The ISP1582 is a device that can initiate SRP.
8.6 Philips high-speed transceiver
8.6.1 Philips Parallel Interface Engine (PIE)
In the high-speed (HS) transceiver, the Philips PIE interface uses a 16-bit parallel
bidirectional data interface. The functions of the HS module also include bit-stuffing or
destuffing and Non-Return-to-Zero Inverted (NRZI) encoding or decoding logic.
8.6.2 Peripheral circuit
To maintain a constant current driver for HS transmit circuits and to bias other analog
circuits, an internal band gap reference circuit and an RREF resistor form the
reference current. This circuit requires an external precision resistor (12.0 kΩ ± 1 %)
connected to the analog ground.
Rev. 03 — 25 August 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
11 of 66
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