DataSheet.jp

ISP1581BD の電気的特性と機能

ISP1581BDのメーカーはNXP Semiconductorsです、この部品の機能は「Universal Serial Bus 2.0 high-speed interface device」です。


製品の詳細 ( Datasheet PDF )

部品番号 ISP1581BD
部品説明 Universal Serial Bus 2.0 high-speed interface device
メーカ NXP Semiconductors
ロゴ NXP Semiconductors ロゴ 




このページの下部にプレビューとISP1581BDダウンロード(pdfファイル)リンクがあります。

Total 30 pages

No Preview Available !

ISP1581BD Datasheet, ISP1581BD PDF,ピン配置, 機能
ISP1581
Universal Serial Bus 2.0 high-speed interface device
Rev. 02 — 23 October 2000
Objective specification
1. General description
The ISP1581 is a cost-optimized and feature-optimized Universal Serial Bus (USB)
interface device, which fully complies with the Universal Serial Bus Specification
Rev. 2.0. It provides high-speed USB communication capacity to systems based on a
microcontroller or microprocessor. The ISP1581 communicates with the system’s
microcontroller/processor through a high-speed general-purpose parallel interface.
The ISP1581 supports automatic detection of USB 2.0 system operation. The
USB 1.1 fall-back mode allows the device to remain operational under full-speed
conditions. It is designed as a generic USB interface device so that it can fit into all
existing device classes, such as: Imaging Class, Mass Storage Devices,
Communication Devices, Printing Devices and Human Interface Devices.
The internal generic DMA block allows easy integration into data streaming
applications. In addition, the various configurations of the DMA block are tailored for
mass storage applications.
The modular approach to implementing a USB interface device allows the designer to
select the optimum system microcontroller from the wide variety available. The ability
to re-use existing architecture and firmware investments shortens the development
c time, eliminates risk and reduces costs. The result is fast and efficient development of
c
the most cost-effective USB peripheral solution.
The ISP1581 is ideally suited for many types of peripherals, such as: printers;
scanners; magneto-optical (MO), compact disc (CD), digital video disc (DVD) and
Zip®/Jaz® drives; digital still cameras; USB-to-Ethernet links; cable and DSL
modems. The low power consumption during ‘suspend’ mode allows easy design of
equipment that is compliant to the ACPI™, OnNow™ and USB power management
requirements.
The ISP1581 also incorporates features such as SoftConnect™, a reduced
frequency crystal oscillator and integrated termination resistors. These features allow
significant cost savings in system design and easy implementation of advanced USB
functionality into PC peripherals.

1 Page





ISP1581BD pdf, ピン配列
3.3 V
1.5
k
RPU 7
RREF 8
12.2 k
(± 0.1%)
to/from USB
D+ D
65
SoftConnect
USB 2.0
TRANSCEIVER
12 MHz
XTAL1
60
XTAL2
59
40× PLL
OSCILLATOR
BIT CLOCK
RECOVERY
PHILIPS
SIE
MEMORY
MANAGEMENT
UNIT
RESET
10
POWER-ON
RESET
internal
reset
INTEGRATED
RAM
(8 KBYTE)
VCC(5.0) 4
2, 37,
43, 64
5V
VOLTAGE
REGULATORS
3.3 V
3.3 V
digital
supply
analog
supply
SYSTEM
CONTROLLER
CS0, CS1,
DREQ, DACK,
DA0*, DA1*, DA2 DIOR, DIOW
5
18, 17,
19, 20, 21
4
12, 13,
14, 15
DMA
HANDLER
DMA
INTERFACE
DMA
REGISTERS
11
16
22
40, 41,
44 to 57 16
19
20, 9 2
EOT
INTRQ
IORDY*
DATA0 to DATA15
BUS_CONF *
MODE0*, MODE1
MICRO-
CONTROLLER
HANDLER
ISP1581
MICRO
CONTROLLER
INTERFACE
22
38, 39, 30 to 35 8
25, 29, 26, 27 4
28
READY*
AD0 to AD7
CS, ALE/A0, (R/W)/RD,
DS/ WR
INT
1, 36, 42, 61
3, 23 4 24, 58
63 62
4
DGND
22
AGND
VCC(3.3)
Vreg (3.3)
SUSPEND WAKEUP
* Denotes shared pin usage
MGT234
The direction of pins DREQ, DACK, DIOR and DIOW is determined by bit MASTER (DMA Hardware register) and bit ATA_MODE (DMA Configuration register).
Fig 1. Block diagram.


3Pages


ISP1581BD 電子部品, 半導体
Philips Semiconductors
ISP1581
USB 2.0 HS interface device
9397 750 07648
Objective specification
Table 2: Pin description for LQFP64 …continued
Symbol [1]
Pin Type [2] Description
MODE0/DA1 20 I/O
during power-up: input to select the read/write strobe
functionality in generic processor mode
0 — Motorola style: pin 26 is R/W and pin 27 is DS
1 — 8051 style: pin 26 is RD and pin 27 is WR
normal operation: address output to select the task file
register of an ATAPI device
DA2
21 O
address output to select the task file register of an ATAPI
device
READY/
IORDY
22 I/O
Generic processor mode: ready signal (READY; output)
A LOW level signals that ISP1581 is processing a previous
command or data and is not ready for the next command or
data transfer; a HIGH level signals that ISP1581 is ready
for the next microprocessor read or write.
Split Bus mode: DMA ready signal (IORDY; input); used
for accessing ATAPI peripherals (PIO and UDMA modes
only).
AGND
23 -
analog ground
VCC(3.3)
24 -
supply voltage (3.3 V ± 10%); supplies internal digital
circuits
CS
25 I
chip select input
(R/W)/RD
26 I
input; function is determined by input MODE0 at power-up:
MODE0 = 0 — pin functions as R/W (Motorola style)
MODE0 = 1 — pin functions as RD (8051 style).
DS/WR
27 I
input; function is determined by input MODE0 at power-up:
MODE0 = 0 — pin functions as DS (Motorola style)
MODE0 = 1 — pin functions as WR (8051 style).
INT
28 O
interrupt output; programmable polarity (active HIGH or
LOW) and signaling (edge or level triggered)
ALE/A0
29 I
input; function determined by input MODE1 during
power-up:
MODE1 = 0 — address latch enable; a falling edge latches
the address on the multiplexed address/data bus (AD[7:0])
MODE1 = 1 — address/data selection on AD[7:0]; a logic 1
indicates that an address will be written at the next WR
pulse; a logic 0 indicates that data will be written at the next
WR pulse; used in Split Bus mode only.
AD0
30 I/O
bit 0 of multiplexed address/data
AD1
31 I/O
bit 1 of multiplexed address/data
AD2
32 I/O
bit 2 of multiplexed address/data
AD3
33 I/O
bit 3 of multiplexed address/data
AD4
34 I/O
bit 4 of multiplexed address/data
AD5
35 I/O
bit 5 of multiplexed address/data
DGND
36 -
digital ground
VCC(5.0)
AD6
37 -
38 I/O
supply voltage (3.3 or 5.0 V)
bit 6 of multiplexed address/data
Rev. 02 — 23 October 2000
© Philips Electronics N.V. 2000. All rights reserved.
6 of 73

6 Page



ページ 合計 : 30 ページ
 
PDF
ダウンロード
[ ISP1581BD データシート.PDF ]


データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。


共有リンク

Link :


部品番号部品説明メーカ
ISP1581BD

Universal Serial Bus 2.0 high-speed interface device

NXP Semiconductors
NXP Semiconductors


www.DataSheet.jp    |   2020   |  メール    |   最新    |   Sitemap