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PDF ISL84522 Data sheet ( Hoja de datos )

Número de pieza ISL84522
Descripción Low-Voltage/ Single and Dual Supply/ Quad SPST/ Analog Switches
Fabricantes Intersil Corporation 
Logotipo Intersil Corporation Logotipo



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Data Sheet
ISL84521, ISL84522, ISL84523
July 2003
FN6031.2
Low-Voltage, Single and Dual Supply,
Quad SPST, Analog Switches
The Intersil ISL84521, ISL84523, ISL84523 devices are
CMOS, precision, quad analog switches designed to operate
from a single +2V to +12V supply or from a ±2V to ±6V supply.
Targeted applications include battery powered equipment that
benefit from the devices’ low power consumption (<1µW), low
leakage currents (1nA max), and fast switching speeds
(tON = 45ns, tOFF = 15ns). A12maximum RON flatness
ensures signal fidelity, while channel-to-channel mismatch is
guaranteed to be less than 4.
The ISL84521, ISL84522, ISL84523 are quad
single-pole/ single-throw (SPST) devices. The ISL84521 has
four normally closed (NC) switches; the ISL84522 has four
normally open (NO) switches; the ISL84523 has two NO and
two NC switches and can be used as a dual SPDT, or a dual
2:1 multiplexer.
Table summarizes the performance of this family. For higher
performance, pin compatible versions and 3mm x 3mm Quad
No-Lead Flatpack (QFN) package see the ISL43140,
ISL43142 data sheet.
TABLE 1. FEATURES AT A GLANCE
ISL84521 ISL84522 ISL84523
Number of Switches
4
4
4
Configuration
±5V RON
±5V tON/tOFF
5V RON
5V tON/tOFF
3V RON
3V tON/tOFF
Packages
All NC
All NO
2 NC/2 NO
656565
45ns/15ns 45ns/15ns 45ns/15ns
125
125
125
60ns/20ns 60ns/20ns 60ns/20ns
260
260
260
120ns/40ns 120ns/40ns 120ns/40ns
16 Ld SOIC (N), 16 Ld TSSOP
Features
• Drop-in Replacements for MAX4521 - MAX4523
• Four Separately Controlled SPST Switches
• Pin Compatible with DG411, DG412, DG413
• ON Resistance (RON Max.) . . . . . . . . . . . . . . . . . . . 100
• RON Matching Between Channels. . . . . . . . . . . . . . . . . . <1
• Low Power Consumption (PD) . . . . . . . . . . . . . . . . . . . .<1µW
• Low Leakage Current (Max at 85oC) . . . . . . . . . . . . 10nA
• Fast Switching Action
- tON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45ns
- tOFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15ns
• Break before Make Timing
• Minimum 2000V ESD Protection per Method 3015.7
• TTL, CMOS Compatible
Applications
• Battery Powered, Handheld, and Portable Equipment
- Cellular/Mobile Phones
- Pagers
- Laptops, Notebooks, Palmtops
• Communications Systems
- Military Radios
- RF “Tee” Switches
• Test Equipment
- Ultrasound
- Electrocardiograph
• Heads-Up Displays
• Audio and Video Switching
• General Purpose Circuits
- +3V/+5V DACs and ADCs
- Digital Filters
- Operational Amplifier Gain Switching Networks
- High Frequency Analog Switching
- High Speed Multiplexing
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
• Application Note AN557 “Recommended Test Procedures
for Analog Switches”
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

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ISL84522 pdf
ISL84521, ISL84522, ISL84523
Electrical Specifications 5V Supply
Test Conditions: V+ = +4.5V to +5.5V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 5),
Unless Otherwise Specified (Continued)
PARAMETER
TEST CONDITIONS
TEMP MIN
MAX
(oC) (NOTE 6) TYP (NOTE 6) UNITS
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+
V+ = 5.5V, VIN = 0V or V+, Switch On or Off
Negative Supply Current, I-
25 -1 0.05 1 µA
Full -1 - 1 µA
25 -1 0.05 1 µA
Full -1 - 1 µA
Electrical Specifications 3V Supply
Test Conditions: V+ = +2.7V to +3.6V, V- = GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 5),
Unless Otherwise Specified
PARAMETER
TEST CONDITIONS
TEMP MIN
MAX
(oC) (NOTE 6) TYP (NOTE 6) UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
ON Resistance, RON
V+ = 2.7V, ICOM = 0.1mA, VNO or VNC = 1V
DIGITAL INPUT CHARACTERISTICS
Full 0
25 -
Full -
- V+ V
260 500
- 600
Input Voltage High, VINH
Input Voltage Low, VINL
Input Current, IINH, IINL
DYNAMIC CHARACTERISTICS
V+ = 3.6V, VIN = 0V or V+
Full -
1.6 2.4 V
Full 0.8
1.6
-V
Full -1 0.03 1 µA
Turn-ON Time, tON
V+ = 2.7V, VNO or VNC = 1.5V, RL = 300, CL = 35pF,
VIN = 0 to V+ (Figure 1)
25
Full
-
-
120 250 ns
- 300 ns
Turn-OFF Time, tOFF
V+ = 2.7V, VNO or VNC = 1.5V, RL = 300, CL = 35pF,
VIN = 0 to V+ (Figure 1)
25
Full
-
-
40 80 ns
- 100 ns
Break-Before-Make Time Delay
(ISL84523), tD
V+ = 3.6V, VNO or VNC = 1.5V, RL = 300, CL = 35pF,
VIN = 0 to 3V (Figure 3)
25
15
50
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0Ω (Figure 2)
25 - 0.5
POWER SUPPLY CHARACTERISTICS
- ns
5 pC
Positive Supply Current, I+
V+ = 3.6V, VIN = 0V or V+, Switch On or Off
25 -1 0.05 1 µA
Full -1 - 1 µA
Negative Supply Current, I-
25 -1 0.05 1 µA
Full -1 - 1 µA
Test Circuits and Waveforms
LOGIC
INPUT
3V
0V
SWITCH
INPUT
VNX
SWITCH
OUTPUT 0V
50%
tOFF
VOUT
90%
tON
tr < 20ns
tf < 20ns
90%
Logic input waveform is inverted for switches that have the opposite
logic sense.
V+
C
C
VNX
SWITCH
INPUT
NO OR NC
IN
COM
VOUT
LOGIC
INPUT
GND
C
V-
RL
300
Repeat test for all switches. CL includes fixture and stray
capacitance.
VOUT = V(NO or NC) -R----L-----+--R--R---L--(--O-----N----)
CL
35pF
FIGURE 1A. MEASUREMENT POINTS
FIGURE 1. SWITCHING TIMES
FIGURE 1B. TEST CIRCUIT
5

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ISL84522 arduino
ISL84521, ISL84522, ISL84523
Small Outline Plastic Packages (SOIC)
N
INDEX
AREA
E
-B-
H
0.25(0.010) M B M
123
-A-
D
SEATING PLANE
A
L
h x 45o
-C-
µα
e A1
B 0.10(0.004)
0.25(0.010) M C A M B S
C
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section
2.2 of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. In-
terlead flash and protrusions shall not exceed 0.25mm (0.010
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch)
10. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are not necessarily exact.
M16.15 (JEDEC MS-012-AC ISSUE C)
16 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
INCHES
MILLIMETERS
SYMBOL
A
A1
B
C
D
E
e
H
h
L
N
α
MIN MAX
0.053
0.069
0.004
0.010
0.014
0.019
0.007
0.010
0.386
0.394
0.150
0.157
0.050 BSC
0.228
0.244
0.010
0.020
0.016
0.050
16
0o 8o
MIN MAX NOTES
1.35 1.75
-
0.10 0.25
-
0.35 0.49
9
0.19 0.25
-
9.80 10.00
3
3.80 4.00
4
1.27 BSC
-
5.80 6.20
-
0.25 0.50
5
0.40 1.27
6
16
0o 8o
7
-
Rev. 1 02/02
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