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ISL6605 の電気的特性と機能

ISL6605のメーカーはIntersil Corporationです、この部品の機能は「Synchronous Rectified MOSFET Driver」です。


製品の詳細 ( Datasheet PDF )

部品番号 ISL6605
部品説明 Synchronous Rectified MOSFET Driver
メーカ Intersil Corporation
ロゴ Intersil Corporation ロゴ 




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ISL6605 Datasheet, ISL6605 PDF,ピン配置, 機能
FORDRNO®EPW-INDEESNDIHGaAtNaNSSC, hIENeDTeEPtRRSOILDURCETCO- IMSML6E6N0D9S
May 9, 2006
ISL6605
FN9091.7
Synchronous Rectified MOSFET Driver
The ISL6605 is a high frequency, MOSFET driver optimized
to drive two N-Channel power MOSFETs in a synchronous-
rectified buck converter topology. This driver combined with
an Intersil HIP63xx or ISL65xx Multi-Phase Buck PWM
controller forms a complete single-stage core-voltage
regulator solution with high efficiency performance at high
switching frequency for advanced microprocessors.
The IC is biased by a single low voltage supply (5V) and
minimizes low driver switching losses for high MOSFET gate
capacitance and high switching frequency applications.
Each driver is capable of driving a 3000pF load with an 8ns
propagation delay and less than 10ns transition time. This
product implements bootstrapping on the upper gate with an
internal bootstrap Schottky diode, reducing implementation
cost, complexity, and allowing the use of higher
performance, cost effective N-Channel MOSFETs. Adaptive
shoot-through protection is integrated to prevent both
MOSFETs from conducting simultaneously.
The ISL6605 features 4A typical sink current for the lower
gate driver, which is capable of holding the lower MOSFET
gate during the Phase node rising edge to prevent shoot-
through power loss caused by the high dv/dt of the Phase
node.
Features
• Drives Two N-Channel MOSFETs
• Adaptive Shoot-Through Protection
• 0.4Ω On-Resistance and 4A Sink Current Capability
• Supports High Switching Frequency
- Fast Output Rise and Fall Time
- Ultra Low Propagation Delay 8ns
• Three-State PWM Input for Power Stage Shutdown
• Internal Bootstrap Schottky Diode
• Low Bias Supply Current (5V, 30µA)
• Enable Input
• QFN Package
- Compliant to JEDEC PUB95 MO-220 QFN-Quad Flat
No Leads-Product Outline.
- Near Chip-Scale Package Footprint; Improves PCB
Efficiency and Thinner in Profile.
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• Core Voltage Supplies for Intel® and AMD®
Microprocessors
• High Frequency Low Profile DC/DC Converters
• High Current Low Voltage DC/DC Converters
• Synchronous Rectification for Isolated Power Supplies
The ISL6605 also features a Three-State PWM input that,
working together with Intersil multi-phase PWM controllers,
will prevent a negative transient on the output voltage when
the output is being shut down. This feature eliminates the
Schottky diode that is usually seen in a microprocessor
power system for protecting the microprocessor from
reversed-output-voltage damage.
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
Pinouts
ISL6605
(8 LD SOIC)
TOP VIEW
ISL6605
(8 LD QFN)
TOP VIEW
UGATE 1
BOOT 2
PWM 3
GND 4
8 PHASE
7 EN
6 VCC
5 LGATE
BOOT 1
PWM 2
87
34
66 EN
5 VCC
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002-2006. All Rights Reserved
Intel® is a registered trademark of Intel Corporation. AMD® is a registered trademark of Advanced Micro Devices, Inc.
All other trademarks mentioned are the property of their respective owners.

1 Page





ISL6605 pdf, ピン配列
ISL6605
Typical Application - Multi-Phase Converter Using ISL6605 Gate Drivers
+5V
PGOOD
VID
(OPTIONAL)
+5V
FB COMP
VCC
VSEN
PWM1
PWM2
PWM
CONTROL
(HIP63XX
or ISL65XX)
ISEN1
ISEN2
FS/EN
GND
+5V
VCC
EN
BOOT
UGATE
PWM
ISL6605
499K*
PHASE
LGATE
+5V
VCC
BOOT
EN
PWM
499K* ISL6605
UGATE
PHASE
LGATE
VIN
VIN
+VCORE
* 499K IS USED TO PULL DOWN THE PWM INPUT TO PREVENT THE PWM FROM FALSE TRIGGERING UGATE DURING STARTUP.
3 FN9091.7
May 9, 2006


3Pages


ISL6605 電子部品, 半導体
ISL6605
This driver is optimized for voltage regulators with large step
down ratio. The lower MOSFET is usually sized much larger
compared to the upper MOSFET because the lower
MOSFET conducts for a much longer time in a switching
period. The lower gate driver is therefore sized much larger
to meet this application requirement. The 0.4Ω on-resistance
and 4A sink current capability enable the lower gate driver to
absorb the current injected to the lower gate through the
drain-to-gate capacitor of the lower MOSFET and prevent a
shoot through caused by the high dv/dt of the phase node.
Three-State PWM Input
A unique feature of the ISL6605 and other Intersil drivers is
the addition of a shutdown window to the PWM input. If the
PWM signal enters and remains within the shutdown window
for a set holdoff time, the output drivers are disabled and
both MOSFET gates are pulled and held low. The shutdown
state is removed when the PWM signal moves outside the
shutdown window. Otherwise, the PWM rising and falling
thresholds outlined in the ELECTRICAL SPECIFICATIONS
determine when the lower and upper gates are enabled.
Adaptive Shoot-Through Protection
Both drivers incorporate adaptive shoot-through protection
to prevent upper and lower MOSFETs from conducting
simultaneously and shorting the input supply. This is
accomplished by ensuring the falling gate has turned off one
MOSFET before the other is allowed to rise.
During turn-off of the lower MOSFET, the LGATE voltage is
monitored until it reaches a 1V threshold, at which time the
UGATE is released to rise. Adaptive shoot-through circuitry
monitors the upper MOSFET gate voltage during UGATE
turn-off. Once the upper MOSFET gate-to-source voltage
has dropped below a threshold of 1V, the LGATE is allowed
to rise.
Internal Bootstrap Diode
This driver features an internal bootstrap Schottky diode.
Simply adding an external capacitor across the BOOT and
PHASE pins completes the bootstrap circuit.The bootstrap
capacitor can be chosen from the following equation:
CBOOT ≥ Δ---Q--V--G--B---A-O---T-O--E---T-
where QGATE is the amount of gate charge required to fully
charge the gate of the upper MOSFET. The ΔVBOOT term is
defined as the allowable droop in the rail of the upper drive.
The above relationship is illustrated in Figure 1.
As an example, suppose an upper MOSFET has a gate
charge, QGATE, of 65nC at 5V and also assume the droop in
the drive voltage over a PWM cycle is 200mV. One will find
that a bootstrap capacitance of at least 0.125μF is required.
The next larger standard value capacitance is 0.15μF. A
good quality ceramic capacitor is recommended.
22.0.0
11.8.8
11.6.6
11.4.4
11.2.2
11.0.0
00.8.8 QGATE = 100 nC
0.6
0.6
0.4
0.4
0.2 20nC
00.2.0 20nC
QGATE=100nC
50nC
50nC
0.0 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
ΔVBOOT(V)
FIGURE 1. BOOTSTRAP CAPACITANCE vs. BOOT RIPPLE
VOLTAGE
Power Dissipation
Package power dissipation is mainly a function of the
switching frequency and total gate charge of the selected
MOSFETs. Calculating the power dissipation in the driver for
a desired application is critical to ensuring safe operation.
Exceeding the maximum allowable power dissipation level
will push the IC beyond the maximum recommended
operating junction temperature of 125°C. The maximum
allowable IC power dissipation for the SO-8 package is
approximately 800mW. When designing the driver into an
application, it is recommended that the following calculation
be performed to ensure safe operation at the desired
frequency for the selected MOSFETs. The power dissipated
by the driver is approximated as below and plotted as in
Figure 2.
P = fsw(1.5VUQU + VLQL) + IDDQVCC
where fsw is the switching frequency of the PWM signal. VU
and VL represent the upper and lower gate rail voltage. QU
and QL are the upper and lower gate charge determined by
MOSFET selection and any external capacitance added to
the gate pins. The IDDQ VCC product is the quiescent power
of the driver and is typically negligible.
6 FN9091.7
May 9, 2006

6 Page



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共有リンク

Link :


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