|
|
74AC02PCのメーカーはFairchild Semiconductorです、この部品の機能は「Quad 2-Input NOR Gate」です。 |
部品番号 | 74AC02PC |
| |
部品説明 | Quad 2-Input NOR Gate | ||
メーカ | Fairchild Semiconductor | ||
ロゴ | |||
このページの下部にプレビューと74AC02PCダウンロード(pdfファイル)リンクがあります。 Total 7 pages
November 1988
Revised November 1999
74AC02•74ACT02
Quad 2-Input NOR Gate
General Description
The AC02/ACT02 contains four, 2-input NOR gates.
Features
s ICC reduced by 50% on 74AC02 only
s Outputs source/sink 24 mA
s ACT02 has TTL-compatible inputs
Ordering Codes:
Order Number
74AC02SC
74AC02SJ
74AC02MTC
74AC02PC
74ACT02SC
74ACT02MTC
74ACT02PC
Package Number
Package Description
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. (PC not available in Tape and Reel.)
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
An, Bn
On
Description
Inputs
Outputs
FACT is a trademark of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation DS009912
www.fairchildsemi.com
1 Page DC Electrical Characteristics for ACT
Symbol
Parameter
VIH Minimum HIGH Level
Input Voltage
VIL Maximum LOW Level
Input Voltage
VOH Minimum HIGH Level
Output Voltage
VCC
TA = +25°C
TA = −40°C to +85°C
(V) Typ
Guaranteed Limits
4.5 1.5 2.0
2.0
5.5 1.5 2.0
2.0
4.5 1.5 0.8
0.8
5.5 1.5 0.8
0.8
4.5 4.49 4.4
4.4
5.5 5.49 5.4
5.4
VOL Maximum LOW Level
Output Voltage
4.5 3.86
5.5 4.86
4.5 0.001 0.1
5.5 0.001 0.1
3.76
4.76
0.1
0.1
4.5 0.36
5.5 0.36
IIN Maximum Input
Leakage Current
5.5
±0.1
ICCT
IOLD
IOHD
ICC
Maximum ICC/Input
Minimum Dynamic
Output Current (Note 6)
Maximum Quiescent
Supply Current
5.5 0.6
5.5
5.5
5.5 4.0
Note 5: All outputs loaded; thresholds on input associated with output under test.
Note 6: Maximum test duration 2.0 ms, one output loaded at a time.
0.44
0.44
±1.0
1.5
75
−75
40.0
Units
Conditions
V VOUT = 0.1V or
VCC − 0.1V
V VOUT = 0.1V or
VCC − 0.1V
V IOUT = −50 µA
VIN = VIL or VIH
V IOH = −24 mA
IOH = −24 mA (Note 5)
V IOUT = 50 µA
VIN = VIL or VIH
V IOL= 24 mA
IOL= 24 mA (Note 5)
µA VI = VCC, GND
mA VI = VCC − 2.1V
mA VOLD = 1.65V Max
mA VOHD = 3.85V Min
µA VIN = VCC or GND
AC Electrical Characteristics for AC
Symbol
Parameter
tPLH Propagation Delay
tPHL Propagation Delay
Note 7: Voltage Range 3.3 is 3.3V ± 0.3V
Voltage Range 5.0 is 5.0V ± 0.5V
VCC
(V)
(Note 7)
3.3
5.0
3.3
5.0
TA = +25°C
CL = 50 pF
Min Typ Max
1.5 5.0 7.5
1.5 4.0 6.0
1.5 5.0 7.5
1.5 4.5 6.5
TA = −40°C to +85°C
CL = 50 pF
Min Max
1.0 8.0
1.0 6.5
1.0 8.0
1.0 7.0
Units
ns
ns
AC Electrical Characteristics for ACT
Symbol
Parameter
tPLH Propagation Delay
tPHL Propagation Delay
Note 8: Voltage Range 5.0 is 5.0V ± 0.5V
VCC
(V)
(Note 8)
5.0
5.0
TA = +25°C
CL = 50 pF
Min Typ Max
1.0 6.0 8.5
1.0 6.5 9.5
TA = −40°C to +85°C
CL = 50 pF
Min Max
1.0 9.0
1.0 10.0
Units
ns
ns
Capacitance
Symbol
CIN
CPD
Parameter
Input Capacitance
Power Dissipation Capacitance
Typ
4.5
30.0
Units
pF
pF
VCC = OPEN
VCC = 5.0V
Conditions
3 www.fairchildsemi.com
3Pages Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Thin Shrink Small Outline Package (TSSOP) JEDEC MO-153, 4.4mm Wide
Package Number MTC14
www.fairchildsemi.com
6
6 Page | |||
ページ | 合計 : 7 ページ | ||
|
PDF ダウンロード | [ 74AC02PC データシート.PDF ] |
データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
部品番号 | 部品説明 | メーカ |
74AC02PC | Quad 2-Input NOR Gate | Fairchild Semiconductor |