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74ABT16245 の電気的特性と機能

74ABT16245のメーカーはFairchild Semiconductorです、この部品の機能は「16-Bit Transceiver with 3-STATE Outputs」です。


製品の詳細 ( Datasheet PDF )

部品番号 74ABT16245
部品説明 16-Bit Transceiver with 3-STATE Outputs
メーカ Fairchild Semiconductor
ロゴ Fairchild Semiconductor ロゴ 




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74ABT16245 Datasheet, 74ABT16245 PDF,ピン配置, 機能
April 1992
Revised May 2005
74ABT16245
16-Bit Transceiver with 3-STATE Outputs
General Description
The ABT16245 contains sixteen non-inverting bidirectional
buffers with 3-STATE outputs and is intended for bus ori-
ented applications. The device is byte controlled. Each
byte has separate control inputs which can be shorted
together for full 16-bit operation. The T/R inputs determine
the direction of data flow through the device. The OE inputs
disable both the A and B ports by placing them in a high
impedance state.
Features
s Bidirectional non-inverting buffers
s Separate control logic for each byte
s 16-bit version of the ABT245
s A and B output sink capability of 64 mA, source
capability of 32 mA
s Guaranteed output skew
s Guaranteed multiple output switching specifications
s Output switching specified for both 50 pF and
250 pF loads
s Guaranteed simultaneous switching noise level and
dynamic threshold performance
s Guaranteed latchup protection
s High impedance glitch free bus loading during entire
power up and power down cycle
s Non-destructive hot insertion capability
Ordering Code:
Order Number Package Number
Package Description
74ABT16245CSSC
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
74ABT16245CMTD
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
Pin Descriptions
Pin Names
OEn
T/Rn
A0A15
B0B15
Description
Output Enable Input (Active LOW)
Transmit/Receive Input
Side A Inputs/Outputs
Side B Inputs/Outputs
© 2005 Fairchild Semiconductor Corporation DS010986
www.fairchildsemi.com

1 Page





74ABT16245 pdf, ピン配列
Absolute Maximum Ratings(Note 1)
Storage Temperature
65qC to 150qC
Ambient Temperature under Bias
55qC to 125qC
Junction Temperature under Bias
55qC to 150qC
VCC Pin Potential to Ground Pin
Input Voltage (Note 2)
0.5V to 7.0V
0.5V to 7.0V
Input Current (Note 2)
30 mA to 5.0 mA
Voltage Applied to Any Output
in the Disabled or
Power-Off State
0.5V to 5.5V
in the HIGH State
Current Applied to Output
0.5V to VCC
in LOW State (Max)
DC Latchup Source Current
twice the rated IOL (mA)
500 mA
Over Voltage Latchup (I/O)
10V
Recommended Operating
Conditions
Free Air Ambient Temperature
Supply Voltage
Minimum Input Edge Rate ('V/'t)
Data Input
Enable Input
40qC to 85qC
4.5V to 5.5V
50 mV/ns
20 mV/ns
Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol
Parameter
VIH Input HIGH Voltage
VIL Input LOW Voltage
VCD Input Clamp Diode Voltage
VOH Output HIGH Voltage
VOL Output LOW Voltage
Min
Typ
Max
Units
VCC
Conditions
2.0 V Recognized HIGH Signal
0.8 V
Recognized LOW Signal
1.2 V Min IIN 18 mA (OEn, T/Rn)
2.5 V Min IOH 3 mA (An, Bn)
2.0 V Min IOH 32 mA (An, Bn)
0.55 V Min IOL 64 mA (An, Bn)
IIH Input HIGH Current
IBVI
IBVIT
IIL
Input HIGH Current Breakdown Test
Input HIGH Current Breakdown Test (I/O)
Input LOW Current
VID Input Leakage Test
4.75
IIH  I OZH Output Leakage Current
IIL  I OZL
IOS
ICEX
IZZ
Output Leakage Current
Output Short-Circuit Current
Output HIGH Leakage Current
Bus Drainage Test
ICCH
ICCL
ICCZ
Power Supply Current
Power Supply Current
Power Supply Current
ICCT
Additional ICC/Input Outputs Enabled
Outputs 3-STATE
Outputs 3-STATE
100
ICCD
Dynamic ICC
(Note 3)
No Load
Note 3: Guaranteed, but not tested.
1
1
7
100
1
1
10
10
275
50
100
100
60
100
2.5
2.5
50
0.1
PA
PA
PA
PA
V
PA
PA
mA
PA
PA
PA
mA
PA
mA
mA
PA
mA/
MHz
Max
VIN 2.7V (OEn, T/Rn) (Note 3)
VIN VCC (OEn, T/Rn)
Max
Max
VIN 7.0V (OEn, T/Rn)
VIN 5.5V (An, Bn)
Max VIN 0.5V (OEn, T/Rn) (Note 3)
VIN 0.0V (OEn, T/Rn)
0.0 IID 1.9 PA (OEn, T/Rn)
All Other Pins Grounded
0  5.5V VOUT 2.7V (An, Bn); OE 2.0V
0  5.5V
Max
Max
0.0
VOUT 0.5V (An, Bn); OE
VOUT 0.0V (An, Bn)
VOUT VCC (An, Bn)
VOUT 5.50V (An, Bn);
All Others GND
2.0V
Max All Outputs HIGH
Max All Outputs LOW
Max OEn VCC, T/Rn GND or VCC
All others at VCC or GND
VI VCC  2.1V
Max OEn, T/ Rn VI VCC  2.1V
Data Input VI VCC  2.1V
All others at VCC or GND
Max Outputs OPEN
OEn GND, T/Rn GND or VCC
One Bit Toggling, 50% Duty Cycle
3 www.fairchildsemi.com


3Pages


74ABT16245 電子部品, 半導体
AC Loading
*Includes jig and probe capacitance
FIGURE 1. Standard AC Test Load
FIGURE 2. Input Pulse Requirements
Amplitude Rep. Rate
tW
tr
tf
3.0V
1 MHz 500 ns 2.5 ns 2.5 ns
FIGURE 3. Test Input Signal Requirements
AC Waveforms
FIGURE 4. 3-STATE Output HIGH
and LOW Enable and Disable Times
FIGURE 6. Propagation Delay Waveforms for
Inverting and Non-Inverting Functions
FIGURE 5. Propagation Delay,
Pulse Width Waveforms
FIGURE 7. Setup Time, Hold Time
and Recovery Time Waveforms
www.fairchildsemi.com
6

6 Page



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