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7429FCT521BTPYB の電気的特性と機能

7429FCT521BTPYBのメーカーはIntegrated Device Technologyです、この部品の機能は「MULTILEVEL PIPELINE REGISTERS」です。


製品の詳細 ( Datasheet PDF )

部品番号 7429FCT521BTPYB
部品説明 MULTILEVEL PIPELINE REGISTERS
メーカ Integrated Device Technology
ロゴ Integrated Device Technology ロゴ 




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7429FCT521BTPYB Datasheet, 7429FCT521BTPYB PDF,ピン配置, 機能
MULTILEVEL
PIPELINE REGISTERS
IDT29FCT520AT/BT/CT/DT
IDT29FCT521AT/BT/CT/DT
Integrated Device Technology, Inc.
FEATURES:
• A, B, C and D speed grades
• Low input and output leakage 1µA (max.)
• CMOS power levels
• True TTL input and output compatibility
– VOH = 3.3V (typ.)
– VOL = 0.3V (typ.)
• High drive outputs (-15mA IOH, 48mA IOL)
• Meets or exceeds JEDEC standard 18 specifications
• Product available in Radiation Tolerant and Radiation
Enhanced versions
• Military product compliant to MIL-STD-883, Class B
and DESC listed (dual marked)
• Available in DIP, SOIC, SSOP, QSOP, CERPACK and
LCC packages
DESCRIPTION:
The IDT29FCT520AT/BT/CT/DT and IDT29FCT521AT/
BT/CT/DT each contain four 8-bit positive edge-triggered
registers. These may be operated as a dual 2-level or as a
single 4-level pipeline. A single 8-bit input is provided and any
of the four registers is available at the 8-bit, 3-state output.
These devices differ only in the way data is loaded into and
between the registers in 2-level operation. The difference is
illustrated in Figure 1. In the IDT29FCT520AT/BT/CT/DT
when data is entered into the first level (I = 2 or I = 1), the
existing data in the first level is moved to the second level. In
the IDT29FCT521AT/BT/CT/DT, these instructions simply
cause the data in the first level to be overwritten. Transfer of
data to the second level is achieved using the 4-level shift
instruction (I = 0). This transfer also causes the first level to
change. In either part I=3 is for hold.
FUNCTIONAL BLOCK DIAGRAM
D0 -D7
8
I0,I1 2
REGISTER
CONTROL
CLK 1
OCTAL REG. A1
OCTAL REG. A2
MUX
OCTAL REG. B1
OCTAL REG. B2
S0 ,S1 2
MUX
OE
8
Y0 -Y7
2619 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1994 Integrated Device Technology, Inc.
6.2
APRIL 1994
DSC-4215/4
1

1 Page





7429FCT521BTPYB pdf, ピン配列
IDT29FCT520AT/BT/CT/DT, 521AT/BT/CT/DT
MULTILEVEL PIPELINE REGISTERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Rating
VTERM(2) Terminal Voltage
with Respect to
GND
VTERM(3) Terminal Voltage
with Respect to
GND
TA Operating
Temperature
TBIAS Temperature
Under Bias
TSTG Storage
Temperature
PT Power Dissipation
Commercial
–0.5 to +7.0
–0.5 to
VCC +0.5
0 to +70
–55 to +125
–55 to +125
0.5
Military
–0.5 to +7.0
–0.5 to
VCC +0.5
–55 to +125
–65 to +135
–65 to +150
0.5
Unit
V
V
°C
°C
°C
W
IOUT
DC Output
–60 to +120 –60 to +120 mA
Current
NOTES:
2619 lnk 03
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability. No terminal voltage may exceed
VCC by +0.5V unless otherwise noted.
2. Input and VCC terminals only.
3. Outputs and I/O terminals only.
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Symbol Parameter(1) Conditions Typ. Max. Unit
CIN Input
Capacitance
VIN = 0V 6 10 pF
COUT Output
VOUT = 0V 8
12 pF
Capacitance
NOTE:
2619 lnk 04
1. This parameter is measured at characterization but not tested.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: TA = 0°C to +70°C, VCC = 5.0V ± 5%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10%
Symbol
Parameter
Test Conditions(1)
Min. Typ.(2)
VIH Input HIGH Level
Guaranteed Logic HIGH Level
2.0 —
VIL
IIH
IIL
IOZH
Input LOW Level
Input HIGH Current(4)
Input LOW Current(4)
High Impedance(4)
Guaranteed Logic LOW Level
VCC = Max.
VI = 2.7V
VCC = Max.
VI = 0.5V
VCC = Max.
VO = 2.7V
——
——
——
——
IOZL Output Current
VO = 0.5V
II
Input HIGH Current(4)
VCC = Max., VI = VCC (Max.)
——
——
VIK
Clamp Diode Voltage
VCC = Min., IN = –18mA
IOS
Short Circuit Current
VCC = Max.(3), VO = GND
— –0.7
–60 –120
VOH Output HIGH Voltage VCC = Min.
IOH = –6mA MIL.
2.4 3.3
VIN = VIH or VIL
IOH = –8mA COM’L.
IOH = –12mA MIL.
2.0 3.0
IOH = –15mA COM’L.
VOL Output LOW Voltage VCC = Min.
IOL = 32mA MIL.
— 0.3
VIN = VIH or VIL
IOL = 48mA COM’L.
VH Input Hysteresis
— — 200
ICC Quiescent Power
Supply Current
VCC = Max.
VIN = GND or VCC
— 0.01
Max.
0.8
±1
±1
±1
±1
±1
–1.2
–225
0.5
1
Unit
V
V
µA
µA
µA
µA
V
mA
V
V
mV
mA
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. The test limit for this parameter is ±5µA at TA = -55°C.
2619 tbl 05
6.2 3


3Pages


7429FCT521BTPYB 電子部品, 半導体
IDT29FCT520AT/BT/CT/DT, 521AT/BT/CT/DT
MULTILEVEL PIPELINE REGISTERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
V CC
VIN
Pulse
Generator
D.U.T.
RT
V OUT
50pF
CL
500
500
SWITCH POSITION
7.0V
Test
Open Drain
Disable Low
Switch
Closed
Enable Low
All Other Tests
Open
DEFINITIONS:
2619 lnk 09
CL= Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
2619 drw 05
SET-UP, HOLD AND RELEASE TIMES
PULSE WIDTH
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
tSU
tSU
tH
tREM
tH
PROPAGATION DELAY
SAME PHASE
INPUT TRANSITION
OUTPUT
OPPOSITE PHASE
INPUT TRANSITION
tPLH
tPLH
tPHL
tPHL
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
2619 drw 06
LOW-HIGH-LOW
PULSE
HIGH-LOW-HIGH
PULSE
1.5V
tW
1.5V
2619 drw 07
ENABLE AND DISABLE TIMES
3V
1.5V
0V
VOH
1.5V
VOL
3V
1.5V
0V
2619 drw 08
ENABLE
DISABLE
CONTROL
INPUT
OUTPUT
NORMALLY
LOW
tPZL
SWITCH
CLOSED
tPZH
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
3V
1.5V
0V
tPLZ
3.5V
3.5V
1.5V
tPHZ
0.3V VOL
1.5V
0.3V VOH
0V 0V
2619 drw 09
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-
HIGH
2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns
6.2 6

6 Page



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部品番号部品説明メーカ
7429FCT521BTPY

MULTILEVEL PIPELINE REGISTERS

Integrated Device Technology
Integrated Device Technology
7429FCT521BTPYB

MULTILEVEL PIPELINE REGISTERS

Integrated Device Technology
Integrated Device Technology


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