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74F113 の電気的特性と機能

74F113のメーカーはFairchild Semiconductorです、この部品の機能は「Dual JK Negative Edge-Triggered Flip-Flop」です。


製品の詳細 ( Datasheet PDF )

部品番号 74F113
部品説明 Dual JK Negative Edge-Triggered Flip-Flop
メーカ Fairchild Semiconductor
ロゴ Fairchild Semiconductor ロゴ 




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74F113 Datasheet, 74F113 PDF,ピン配置, 機能
April 1988
Revised July 1999
74F113
Dual JK Negative Edge-Triggered Flip-Flop
General Description
The 74F113 offers individual J, K, Set and Clock inputs.
When the clock goes HIGH the inputs are enabled and
data may be entered. The logic level of the J and K inputs
may be changed when the clock pulse is HIGH and the flip-
flop will perform according to the Truth Table as long as
minimum setup and hold times are observed. Input data is
transferred to the outputs on the falling edge of the clock
pulse.
Asynchronous input:
LOW input to SD sets Q to HIGH level
Set is independent of clock
Ordering Code:
Order Number Package Number
Package Description
74F113SC
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
74F113SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F113PC
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
© 1999 Fairchild Semiconductor Corporation DS009473
www.fairchildsemi.com

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74F113 pdf, ピン配列
Absolute Maximum Ratings(Note 1)
Storage Temperature
65°C to +150°C
Ambient Temperature under Bias
55°C to +125°C
Junction Temperature under Bias
55°C to +150°C
VCC Pin Potential to Ground Pin
Input Voltage (Note 2)
0.5V to +7.0V
0.5V to +7.0V
Input Current (Note 2)
30 mA to +5.0 mA
Voltage Applied to Output
in HIGH State (with VCC = 0V)
Standard Output
3-STATE Output
0.5V to VCC
0.5V to +5.5V
Current Applied to Output
in LOW State (Max)
twice the rated IOL (mA)
Recommended Operating
Conditions
Free Air Ambient Temperature
Supply Voltage
0°C to +70°C
+4.5V to +5.5V
Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol
Parameter
Min
Typ
Max
Units
VCC
Conditions
VIH
VIL
VCD
VOH
VOL
IIH
IBVI
ICEX
VID
IOD
IIL
IOZH
IOZL
IOS
ICC
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH
Voltage
Output LOW
Voltage
Input HIGH
Current
Input HIGH Current
Breakdown Test
Output HIGH
Leakage Current
Input Leakage
Test
Output Leakage
Circuit Current
Input LOW Current
10% VCC
5% VCC
10% VCC
2.0
2.5
2.7
4.75
Output Leakage Current
Output Leakage Current
Output Short-Circuit Current
Power Supply Current
60
0.8
1.2
0.5
V
V
V
V
V
Recognized as a HIGH Signal
Recognized as a LOW Signal
Min IIN = −18 mA
Min IOH = −1 mA
IOH = −1 mA
Min IOL = 20 mA
5.0 µA Max VIN = 2.7V
7.0 µA Max VIN = 7.0V
50
µA
Max
VOUT = VCC
V 0.0 IID = 1.9 µA
All Other Pins Grounded
3.75
µA
0.0 VIOD = 150 mV
All Other Pins Grounded
0.6
VIN = 0.5V (Jn, Kn)
2.4 mA Max VIN = 0.5V (CPn)
3.0
VIN = 0.5V (SDn)
50 µA Max VOUT = 2.7V
50 µA Max VOUT = 0.5V
150 mA Max VOUT = 0V
12 19 mA Max
3 www.fairchildsemi.com


3Pages


74F113 電子部品, 半導体
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N14A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
www.fairchildsemi.com
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Link :


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