DataSheet.jp

74F109 の電気的特性と機能

74F109のメーカーはFairchild Semiconductorです、この部品の機能は「Dual JK Positive Edge-Triggered Flip-Flop」です。


製品の詳細 ( Datasheet PDF )

部品番号 74F109
部品説明 Dual JK Positive Edge-Triggered Flip-Flop
メーカ Fairchild Semiconductor
ロゴ Fairchild Semiconductor ロゴ 




このページの下部にプレビューと74F109ダウンロード(pdfファイル)リンクがあります。

Total 7 pages

No Preview Available !

74F109 Datasheet, 74F109 PDF,ピン配置, 機能
April 1988
Revised November 1999
74F109
Dual JK Positive Edge-Triggered Flip-Flop
General Description
The F109 consists of two high-speed, completely indepen-
dent transition clocked JK flip-flops. The clocking operation
is independent of rise and fall times of the clock waveform.
The JK design allows operation as a D-type flip-flop (refer
to F74 data sheet) by connecting the J and K inputs.
Asynchronous Inputs:
LOW input to SD sets Q to HIGH level
LOW input to CD sets Q to LOW level
Clear and Set are independent of clock
Simultaneous LOW on CD and SD makes
both Q and Q HIGH
Ordering Code:
Order Number Package Number
Package Description
74F109SC
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150Narrow Body
74F109SJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE 11, 5.3mm Wide
74F109PC
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
© 1999 Fairchild Semiconductor Corporation DS009471
www.fairchildsemi.com

1 Page





74F109 pdf, ピン配列
Absolute Maximum Ratings(Note 1)
Storage Temperature
Ambient Temperature under Bias
Junction Temperature under Bias
VCC Pin Potential to
Ground Pin
Input Voltage (Note 2)
Input Current (Note 2)
Voltage Applied to Output
in HIGH State (with Vcc = 0V)
Standard Output
3-STATE Output
Current Applied to Output
in LOW State (Max)
65°C to +150°C
55°C to +125°C
55°C to +175°C
0.5V to +7.0V
0.5V to +7.0V
30 mA to +5.0 mA
0.5V to VCC
0.5V to +5.5V
twice the rated IOL (mA)
Recommended Operating
Conditions
Free Air Ambient Temperature
Supply Voltage
0°C to +70°C
+4.5V to +5.5V
Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol
Parameter
VIH
VIL
VCD
VOH
VOL
IIH
IBVI
ICEX
VID
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH Voltage
Output LOW Voltage
Input HIGH Current
10% VCC
5% VCC
10% VCC
Input HIGH Current Breakdown Test
Output HIGH Leakage Current
Input Leakage Test
IOD Output Leakage
Circuit Current
IIL Input LOW Current
IOS Output Short-Circuit Current
ICC Power Supply Current
Min
Typ
Max
Units
VCC
Conditions
2.0
2.5
2.7
4.75
V Recognized as a HIGH Signal
0.8 V
Recognized as a LOW Signal
1.2 V Min IIN = −18 mA
IOH = −1 mA
V Min
IOH = −1 mA
0.5 V Min IOL = 20 mA
5.0 µA Max VIN = 2.7V
7.0 µA Max VIN = 7.0V
50 µA Max VOUT = VCC
IID = 1.9 µA
V 0.0
All Other Pins Grounded
3.75
µA
VIOD = 150 mV
0.0
All Other Pins Grounded
0.6 mA Max VIN = 0.5V (Jn, Kn)
1.8 mA Max VIN = 0.5V (CDn, SDn)
60
150
mA
Max VOUT = 0V
11.7 17.0 mA Max CP = 0V
3 www.fairchildsemi.com


3Pages


74F109 電子部品, 半導体
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M16D
www.fairchildsemi.com
6

6 Page



ページ 合計 : 7 ページ
 
PDF
ダウンロード
[ 74F109 データシート.PDF ]


データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。


共有リンク

Link :


部品番号部品説明メーカ
74F10

54F10 Triple 3-Input NAND Gate (Rev. A)

Texas Instruments
Texas Instruments
74F10

Triple 3-input NAND gate

NXP Semiconductors
NXP Semiconductors
74F10

Triple 3-Input NAND Gate

Fairchild Semiconductor
Fairchild Semiconductor
74F10

Triple 3-Input NAND Gate

National Semiconductor
National Semiconductor


www.DataSheet.jp    |   2020   |  メール    |   最新    |   Sitemap