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PDF 54ABT16374 Data sheet ( Hoja de datos )

Número de pieza 54ABT16374
Descripción 16-Bit D Flip-Flop with TRI-STATE Outputs
Fabricantes National Semiconductor 
Logotipo National Semiconductor Logotipo



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No Preview Available ! 54ABT16374 Hoja de datos, Descripción, Manual

July 1998
54ABT16374
16-Bit D Flip-Flop with TRI-STATE® Outputs
General Description
The ABT16374 contains sixteen non-inverting D flip-flops
with TRI-STATE outputs and is intended for bus oriented ap-
plications. The device is byte controlled. A buffered clock
(CP) and Output Enable (OE) are common to each byte and
can be shorted together for full 16-bit operation.
Features
n Separate control logic for each byte
n 16-bit version of the ABT374
n Edge-triggered D-type inputs
n Buffered Positive edge-triggered clock
n High impedance glitch free bus loading during entire
power up and power down cycle
n Non-destructive hot insertion capability
n Guaranteed latch-up protection
n Standard Microcircuit Drawing (SMD) 5962-9320101
Ordering Code:
Commercial
54ABT16374W-QML
Package
Number
WA48A
48-Lead Cerpack
Package Description
Connection Diagram
Logic Symbol
Pin Assignment for Cerpack
Pin Description
DS100224-1
Pin
Names
OEn
CPn
D0– D15
O0– O15
Description
TRI-STATE Output Enable Input (Active Low)
Clock Pulse Input (Active Rising Edge)
Data Inputs
TRI-STATE Outputs
DS100224-2
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
© 1998 National Semiconductor Corporation DS100224
PrintDate=1998/07/14 PrintTime=11:05:34 43604 ds100224 Rev. No. 1 cmserv Proof
www.national.com
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54ABT16374 pdf
Amplitude Rep Rate
tW
3.0V
1 MHz 500 ns
tr
2.5 ns
tf
2.5 ns
FIGURE 4. Test Input Signal Requirements
DS100224-6
*Includes jig and probe capacitance
FIGURE 1. Standard AC Test Load
DS100224-7
FIGURE 2. Propagation Delay Waveforms
for Inverting and Non-Inverting Functions
DS100224-10
FIGURE 5. Propagation Delay,
Pulse Width Waveforms
DS100224-8
FIGURE 3. Test Input Pulse Requirements
FIGURE 6. Setup Time, Hold Time
and Recovery Time Waveforms
DS100224-11
DS100224-12
FIGURE 7. TRI-STATE Output HIGH
and LOW Enable and Disable Times
Book
Extract
End
5
PrintDate=1998/07/14 PrintTime=11:05:38 43604 ds100224 Rev. No. 1 cmserv Proof
www.national.com
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