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4528B の電気的特性と機能

4528BのメーカーはFairchild Semiconductorです、この部品の機能は「Dual Monostable Multivibrator」です。


製品の詳細 ( Datasheet PDF )

部品番号 4528B
部品説明 Dual Monostable Multivibrator
メーカ Fairchild Semiconductor
ロゴ Fairchild Semiconductor ロゴ 




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4528B Datasheet, 4528B PDF,ピン配置, 機能
October 1987
Revised August 2000
CD4528BC
Dual Monostable Multivibrator
General Description
The CD4528B is a dual monostable multivibrator. Each
device is retriggerable and resettable. Triggering can occur
from either the rising or falling edge of an input pulse,
resulting in an output pulse over a wide range of widths.
Pulse duration and accuracy are determined by external
timing components Rx and Cx.
Features
s Wide supply voltage range: 3.0V to 18V
s Separate reset available
s Quiescent current = 5.0 nA/package (typ.) at 5.0 VDC
s Diode protection on all inputs
s Triggerable from leading or trailing edge pulse
s Capable of driving two low-power TTL loads or one low-
power Schottky TTL load over the rated temperature
range
Ordering Code:
Order Number Package Number
Package Description
CD4528BCM
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
CD4528BCN
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Truth Table
Top View
Inputs
Clear
A
LX
XH
XX
HL
H
H = HIGH Level
L = LOW Level
↑ = Transition from LOW-to-HIGH
↓ = Transition from HIGH-to-LOW
= One HIGH Level Pulse
= One LOW Level Pulse
X = Irrelevant
B
X
X
L
H
Outputs
QQ
LH
LH
L H
© 2000 Fairchild Semiconductor Corporation DS005998
www.fairchildsemi.com

1 Page





4528B pdf, ピン配列
Absolute Maximum Ratings(Note 1)
(Note 2)
Recommended Operating
Conditions (Note 2)
DC Supply Voltage (VDD)
0.5 VDC to +18 VDC
Input Voltage, All Inputs (VIN)
0.5 VDC to VDD +0.5 VDC
Storage Temperature Range (TS)
65°C to +150°C
Power Dissipation (PD)
Dual-In-Line
700 mW
Small Outline
500 mW
Lead Temperature (TL)
(Soldering, 10 seconds)
260°C
DC Supply Voltage (VDD)
3V to 15V
Input Voltage (VIN)
0V to VDD VDC
Operating Temperature Range (TA)
40°C to +85°C
Note 1: Absolute Maximum Ratingsare those values beyond which the
safety of the device cannot be guaranteed. Except for Operating Tempera-
ture Range, they are not meant to imply that the devices should be oper-
ated at these limits. The table of Electrical Characteristicsprovides
conditions for actual device operation.
Note 2: VSS = 0V unless otherwise specified.
DC Electrical Characteristics (Note 3)
Symbol
Parameter
Conditions
IDD Quiescent Device Current VDD = 5V
VDD = 10V
VDD = 15V
VOL LOW Level Output Voltage VDD = 5V
VDD = 10V
VDD = 15V
VOH HIGH Level Output Voltage VDD = 5V
VDD = 10V
VDD = 15V
VIL LOW Level Input Voltage
VDD = 5V, VO = 0.5V or 4.5V
VDD = 10V, VO = 1V or 9V
VDD = 15V, VO = 1.5V or 13.5V
VIH HIGH Level Input Voltage
VDD = 5V, VO = 0.5V or 4.5V
VDD = 10V, VO = 1V or 9V
VDD = 15V, VO = 1.5V or 13.5V
IOL
LOW Level Output Current
VDD = 5V, VO = 0.4V
(Note 4)
VDD = 10V, VO = 0.5V
VDD = 15V, VO = 1.5V
IOH
HIGH Level Output Current
VDD = 5V, VO = 4.6V
(Note 4)
VDD = 10V, VO = 9.5V
VDD = 15V, VO = 13.5V
IIN Input Current
VDD = 15V, VIN = 0V
VDD = 15V, VIN = 15V
Note 3: VSS = 0V unless otherwise specified.
Note 4: IOH and IOL are tested one output at a time.
40°C
Min Max
+25°C
Min Typ Max
+85°C
Units
Min Max
20 0.005 20
150 µA
40 0.010 40
300 µA
80 0.015 80
600 µA
0.05
0.05
0.05 V
0.05
0.05
0.05 V
0.05
0.05
0.05 V
4.95
4.95 5.0
4.95
V
9.95
9.95 10.0
9.95
V
14.95
14.95 15.0
14.95
V
1.5 2.25 1.5
1.5 V
3.0 4.50 3.0
3.0 V
4.0 6.75 4.0
4.0 V
3.5
3.5 2.75
3.5
V
7.0
7.0 5.50
7.0
V
11.0 11.0 8.25 11.0
V
0.52
0.44 0.88
0.36
mA
1.3
1.1 2.25
0.9
mA
3.6 3.0 8.8 2.4 mA
0.2
0.16 0.36
0.12
mA
0.5
0.4 0.9
0.3
mA
1.4
1.2 3.5
1.0
0.3
105 0.3
1.0
0.3 105 0.3
1.0
mA
µA
µA
3 www.fairchildsemi.com


3Pages


4528B 電子部品, 半導体
AC Test Circuits and Waveforms
Duty Cycle = 50%
FIGURE 3. Power Dissipation Test Circuit and Waveforms
*Includes capacitance of probes, wiring, and fixture parasitic.
Note: AC test waveforms for PG1, PG2, and PG3 in Figure 4.
Input Connections
Characteristics
tPLH, tPHL, tr, tf,
PWout, PWin
tPLH, tPHL, tr, tf,
PWout, PWin
tPLH(R), tPHL(R), PWin
CD
VDD
A
PG1
VDD
VSS
PG3 PG1
B
VDD
PG2
PG2
www.fairchildsemi.com
FIGURE 4. AC Test Circuit
6

6 Page



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