5962R9XXXX01VRC Datasheet PDF - Intersil Corporation
| Part Number | 5962R9XXXX01VRC | |
| Description | Radiation Hardened 8-Bit Bidirectional CMOS/TTL Level Converter | |
| Manufacturers | Intersil Corporation | |
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HS-3374RH
March 1996
Radiation Hardened
8-Bit Bidirectional CMOS/TTL Level Converter
Features
Pinout
• Devices QML Qualified in Accordance with MIL-PRF-38535
• Detailed Electrical and Screening Requirements are
Contained in SMD# 5962-9XXXX and Intersil’ QM Plan
• Radiation Hardened EPI-CMOS
- Total Dose 1 x 105 RAD(Si)
- Latch-Up Immune > 1 x 1012 RAD (Si)/s (Note 1)
• Low Propagation Delay Time
- Typical CMOS to TTL Pre-RAD 40ns
- Typical CMOS to TTL Post 100K RAD 40ns
- Typical TTL to CMOS Pre-RAD 50ns
- Typical TTL to CMOS Post 100K RAD 50ns
• Low Standby Power
• +10V CMOS and +5V TTL Power Supply Inputs
• Eight Non-inverting Three-State Input/Output Channels
• No External TTL Input Pull-Up Resistors Required
• High TTL Sink Current
• Equivalent to Sandia SA2996
• Military Temperature Range -55oC to +125oC
HS-3374RH
MIL-STD-1835, CDIP2-T22
(SBDIP)
TOP VIEW
VDD 1
A0 2
A1 3
A2 4
CMOS
INPUT/OUTPUT
A3 5
A4 6
A5 7
A6 8
A7 9
ENABLE 10
GND 11
22 VCC
21 B0
20 B1
19 B2
18 B3
17 B4
TTL
INPUT/OUTPUT
16 B5
15 B6
14 B7
13 DISABLE
12 NC
Description
The Intersil HS-3374RH is a radiation hardened 8-bit
bidirectional level converter designed to interface CMOS logic
levels with TTL logic levels in radiation hardened bus oriented
systems. The HS-3374RH is fabricated using a radiation
hardened EPI-CMOS process and features eight parallel
bidirectional buffer/level converters.
Two control inputs, ENABLE and DISABLE, are used to deter-
mine the direction of data flow, and to set both the in puts and
outputs in the high impedance state. The control inputs may be
driven by either TTL or CMOS logic drivers capable of sinking
one standard TTL load.
The HS-3374RH is a non-inverting version of the industry
standard CD40116. The non-inverting outputs of the
HS-3374RH reduce PC board chip count by eliminating the
need to restore data back to a non-inverted format.
NOTE:
1. For operation at 10V and transient levels above 1 x 1010 RAD (Si)/s,
please refer to Application Note 401.
Functional Diagram
DISABLE
13
CMOS
8
IN/OUT
2-9
ENABLE
10
LEVEL
SHIFTER
VDD = 1
VCC = 22
GND = 11
8
TTL
OUT (IN)
14-21
Ordering Information
PART NUMBER
5962R9XXXX01QRC
5962R9XXXX01VRC
HS1-3374 (SAMPLE)
TEMPERATURE RANGE
-55oC to +125oC
-55oC to +125oC
+25oC
SCREENING LEVEL
MIL-PRF-38535 Level Q
MIL-PRF-38535 Level V
Sample
PACKAGE
22 Lead SBDIP
22 Lead SBDIP
22 Lead SBDIP
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
1
Spec Number 518052
File Number 3038.1
|
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HS-3374RH
Functional Block Diagram
1 OF 8 IDENTICAL CIRCUITS
VDD
VDD
2 (3, 4, 5, 6, 7, 8, 9)
A1 CMOS
INPUT (OUTPUT)
VCC
VDD
D
LEVEL
SHIFTER
VCC
B1 TTL
OUTPUT
(INPUT)
21 (20, 19,
18, 17, 16,
15, 14)
DISABLE
13
ENABLE
10
LEVEL
SHIFTER
VDD
GND
LEVEL
SHIFTER
D
E
GND
E
INPUT (OUTPUT)
DATA
TERMINAL
NUMBER
A0 2
A1 3
A2 4
A3 5
A4 6
A5 7
A6 8
A7 9
GND
OUTPUT (INPUT)
DATA
TERMINAL
NUMBER
B0 21
B1 20
B2 19
B3 18
B4 17
B5 16
B6 15
B7 14
GND
NOTES:
1. Enable and disable are TTL type inputs
2. D and E outputs are common to all 8 channels
TRUTH TABLE
ENABLE DISABLE
FUNCTION
X 0 Convert CMOS Level to TTL Level
1 1 Convert TTL Level to CMOS Level
0 1 High Impedance (Z)
0 = Low Level 1 = High Level X = Don’t Care
Z = High Impedance on Both CMOS and TTL sides.
NOTE: An important caveat that is applicable to CMOS devices in
general is that unused inputs should never be left floating. This rule
applies to inputs connected to a three-state bus. The need for
external pull-up resistors during three-state bus conditions is
eliminated by the presence of regenerative latches on the following
HS-3374RH pins: A0 - 7.
The functional block diagram depicts one of these pins with the
regenerative latch. When the CMOS driver assumes the high
impedance state, the latch holds the bus in whatever logic state
(high or low) it was before the three-state condition. A transient
drive current of ±1.5mA at VDD/2 ±0.5V for 10ns is required to
switch the latch. Thus, CMOS device inputs connected to the bus
are not allowed to float during three-state conditions.
* WARNING: Do not activate the Disable input by hardwiring to any
TTL input pins. This is an incorrect mode of operation.
Spec Number 518052
5
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| Part Number | Description | MFRS |
| 5962R9XXXX01VRC | The function is Radiation Hardened 8-Bit Bidirectional CMOS/TTL Level Converter. Intersil Corporation | |
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