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5962F9862301V9A の電気的特性と機能

5962F9862301V9AのメーカーはIntersil Corporationです、この部品の機能は「Radiation Hardened Hex Inverting Schmitt Trigger」です。


製品の詳細 ( Datasheet PDF )

部品番号 5962F9862301V9A
部品説明 Radiation Hardened Hex Inverting Schmitt Trigger
メーカ Intersil Corporation
ロゴ Intersil Corporation ロゴ 




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5962F9862301V9A Datasheet, 5962F9862301V9A PDF,ピン配置, 機能
Data Sheet
ACS14MS
November 1998
File Number 4544
Radiation Hardened Hex Inverting Schmitt
Trigger
The Radiation Hardened ACS14MS is a Hex Inverting
Schmitt Trigger. This device simply inverts the level present
on each input. The Schmitt Trigger input stage provides
400mV (Min) of hysteresis and permits input signals with
longer rise times. All inputs are buffered and the outputs are
designed for balanced propagation delay and transition
times.
The ACS14MS is fabricated on a CMOS Silicon on Sapphire
(SOS) process, which provides an immunity to Single Event
Latch-up and the capability of highly reliable performance in
any radiation environment. These devices offer significant
power reduction and faster performance when compared to
ALSTTL types.
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed below must be used when ordering.
Detailed Electrical Specifications for the ACS14MS are
contained in SMD 5962-98623. A “hot-link” is provided
on our homepage with instructions for downloading.
www.intersil.com/data/sm/index.asp
Ordering Information
ORDERING NUMBER
5962F9862301VCC
ACS14D/SAMPLE-03
5962F9862301VXC
ACS14K/SAMPLE-03
5962F9862301V9A
INTERNAL MKT. NUMBER
ACS14DMSR-03
ACS14D/SAMPLE-03
ACS14KMSR-03
ACS14K/SAMPLE-03
ACS14HMSR-03
Pinouts
ACS14MS
(SBDIP)
TOP VIEW
A1 1
Y1 2
A2 3
Y2 4
A3 5
Y3 6
GND 7
14 VCC
13 A6
12 Y6
11 A5
10 Y5
9 A4
8 Y4
Features
• QML Qualified Per MIL-PRF-38535 Requirements
• 1.25 Micron Radiation Hardened SOS CMOS
• Radiation Environment
- Latch-Up Free Under any Conditions
- Total Dose. . . . . . . . . . . . . . . . . . . . . . 3 x 105 RAD (Si)
- SEU Immunity . . . . . . . . . . . . <1 x 10-10 Errors/Bit/Day
- SEU LET Threshold . . . . . . . . . . . >100MeV/(mg/cm2)
• Input Logic Levels . . . . VIL = (0.3)(VCC), VIH = (0.7)(VCC)
• Hysteresis Voltage . . . . . . . . . . . . . . . . . . . . 400mV (Min)
• Output Current . . . . . . . . . . . . . . . . . . . . . . . . ±8mA (Min)
• Quiescent Supply Current . . . . . . . . . . . . . . 100µA (Max)
• Propagation Delay . . . . . . . . . . . . . . . . . . . . . 14ns (Max)
Applications
• High Speed Control Circuits
• Sensor Monitoring
• Low Power Designs
TEMP. RANGE (oC)
-55 to 125
25
-55 to 125
25
25
PACKAGE
14 Ld SBDIP
14 Ld SBDIP
14 Ld Flatpack
14 Ld Flatpack
Die
DESIGNATOR
CDIP2-T14
CDIP2-T14
CDFP4-F14
CDFP4-F14
N/A
A1
Y1
A2
Y2
A3
Y3
GND
ACS14MS
(FLATPACK)
TOP VIEW
1 14
2 13
3 12
4 11
5 10
69
78
VCC
A6
Y6
A5
Y5
A4
Y4
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999

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部品番号部品説明メーカ
5962F9862301V9A

Radiation Hardened Hex Inverting Schmitt Trigger

Intersil Corporation
Intersil Corporation


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