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5962-9581501HXA の電気的特性と機能

5962-9581501HXAのメーカーはAnalog Devicesです、この部品の機能は「Dual/ 12-Bit/ 40 MSPS MCM A/D Converter with Analog Input Signal Conditioning」です。


製品の詳細 ( Datasheet PDF )

部品番号 5962-9581501HXA
部品説明 Dual/ 12-Bit/ 40 MSPS MCM A/D Converter with Analog Input Signal Conditioning
メーカ Analog Devices
ロゴ Analog Devices ロゴ 




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5962-9581501HXA Datasheet, 5962-9581501HXA PDF,ピン配置, 機能
a Dual, 12-Bit, 40 MSPS MCM A/D Converter
with Analog Input Signal Conditioning
AD10242
FEATURES
Two Matched ADCs with Input Signal Conditioning
Selectable Bipolar Input Voltage Range
(؎0.5 V, ؎1.0 V, ؎2.0 V)
Full MIL-STD-883B Compliant
80 dB Spurious-Free Dynamic Range
Trimmed Channel-Channel Matching
APPLICATIONS
Radar Processing
Communications Receivers
FLIR Processing
Secure Communications
Any I/Q Signal Processing Application
PRODUCT DESCRIPTION
The AD10242 is a complete dual signal chain solution including
onboard amplifiers, references, ADCs, and output buffering pro-
viding unsurpassed total system performance. Each channel is
laser trimmed for gain and offset matching and provides channel-
to-channel crosstalk performance better than 80 dB. The AD10242
utilizes two each of the AD9631, OP279, and the AD9042 in a
custom MCM to gain space, performance, and cost advantages
over solutions previously available.
The AD10242 operates with ± 5.0 V for the analog signal condi-
tioning with a separate +5.0 V supply for the analog-to-digital
conversion. Each channel is completely independent allowing
operation with independent encode or analog inputs. The
AD10242 also offers the user a choice of analog input signal
ranges to minimize additional signal conditioning required for
multiple functions within a single system. The heart of the
AD10242 is the AD9042 which is designed specifically for appli-
cations requiring wide dynamic range.
The AD10242 is manufactured by Analog Devices on our
MIL-PRF-38534 MCM line and is completely qualified. Units
are packaged in a custom cofired ceramic 68-lead gull wing
package and specified for operation from –55°C to +125°C.
Contact the factory for additional custom options including
those which allow the user to ac couple the ADC directly, by-
passing the front end amplifier section. Also see the AD9042
data sheet for additional details on ADC performance.
PRODUCT HIGHLIGHTS
1. Guaranteed sample rate of 40 MSPS.
2. Dynamic performance specified over entire Nyquist band;
spurious signals @ 80 dBc for –1 dBFS input signals.
3. Low power dissipation: <2 W off ± 5.0 V supplies.
4. User defined input amplitude.
5. Packaged in 68-lead ceramic leaded chip carrier.
FUNCTIONAL BLOCK DIAGRAM
AIN3
8
AIN2
7
AIN1
6
UNEG UCOM UPOS
56 55 57
AIN3
64
AIN2
63
AIN1
62
UPOS 12
UCOM 4
OP279
AD9631
OP279
AD9631
UNEG 3
(LSB) D0A 17
D1A 18
D2A 19
D3A 20
D4A 21
D5A 22
D6A 23
D7A 24
D8A 25
OP279
AD9042
VREF
12
9
OUTPUT BUFFERING
TIMING
28 29
ENC ENC
31
D9A
32 33
D10A D11A
(MSB)
AD10242
OP279
AD9042
VREF
TIMING
12
OUTPUT BUFFERING
5
7
52 ENC
51 ENC
49 D11B (MSB)
48 D10B
47 D9B
46 D8B
45 D7B
36 37
D0B D1B
(LSB)
38
D2B
39
D3B
40
D4B
41
D5B
42
D6B
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
World Wide Web Site: http://www.analog.com
Fax: 617/326-8703
© Analog Devices, Inc., 1997

1 Page





5962-9581501HXA pdf, ピン配列
AD10242
Parameter
SPURIOUS-FREE DYNAMIC RANGE9
Analog Input @ 1.2 MHz
@ 4.85 MHz
@ 9.9 MHz
@ 19.5 MHz
Temp
+25°C
+25°C
Full
+25°C
Full
+25°C
Full
Test
Level
Mil
Subgroup
AD10242BZ/TZ
Min Typ Max
Units
I
I4
II 5, 6
I4
II 5, 6
I4
II 5, 6
81
70 80
70 79
63 70
63 69
60 67
60 66
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
TWO-TONE IMD REJECTION10
F1, F2 @ –7 dBFS
Full II 4, 5, 6 70 76
dBc
CHANNEL-TO-CHANNEL ISOLATION11 +25°C
IV
12
75 80
dB
TRANSIENT RESPONSE
+25°C
V
10 ns
LINEARITY
Differential Nonlinearity
(Encode = 20 MHz)
Integral Nonlinearity
(Encode = 20 MHz)
+25°C
Full
+25°C
Full
IV
IV
V
V
12
12
0.3 1.0 LSB
0.5 1.25 LSB
0.3 LSB
0.5 LSB
OVERVOLTAGE RECOVERY TIME12
VIN = 2.0 × FS
VIN = 4.0 × FS
DIGITAL OUTPUTS
Logic Compatibility
Logic “1” Voltage13
Logic “0” Voltage14
Output Coding
Full
Full
Full
Full
IV 12
IV 12
I 1, 2, 3
I 1, 2, 3
50 100 ns
75 200 ns
CMOS
3.5 4.2
0.45 0.65
Twos Complement
V
V
POWER SUPPLY
AVCC Supply Voltage
I (AVCC) Current
AVEE Supply Voltage
I (AVEE) Current
DVCC Supply Voltage
I (DVCC) Current
ICC (Total) Supply Current
Power Dissipation (Total)
Power Supply Rejection Ratio (PSRR)
Pass Band Ripple to 10 MHz
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
VI
V
VI
V
VI
V
I 1, 2, 3
I 1, 2, 3
I 7, 8
IV 12
+5.0 V
260 mA
–5.0 V
55 mA
+5.0 V
25 mA
350 400 mA
1.75 2.0 W
0.01 0.02 % FSR/% VS
0.2 dB
NOTES
1 Gain tests are performed on AIN3 over specified input voltage range.
2 Input capacitance specifications combines AD9631 die capacitance + ceramic package capacitance.
3 Full power bandwidth is the frequency at which the spectral power of the fundamental frequency (as determined by FFT analysis) is reduced by 3 dB.
4 ENCODE (Pin 4) driven by single-ended source; ENCODE (Pin 5) bypassed to ground through 0.01 µF capacitor.
5 ENCODE (Pin 4) may also be driven differentially in conjunction with ENCODE (Pin 5); see “Encoding the AD10242” for details.
6 Minimum and maximum conversion rates allow for variation in Encode Duty Cycle of 50% ± 5%.
7 Analog Input signal power at –1 dBFS; signal-to-noise ratio (SNR) is the ratio of signal level to total noise (first 5 harmonics removed). Encode = 40.0 MSPS.
8 Analog Input signal power at –1 dBFS; signal-to-noise and distortion (SINAD) is the ratio of signal level to total noise + harmonics. Encode = 40.0 MSPS.
9 Analog Input signal equal –1 dBFS; SFDR is ratio of converter full scale to worst spur.
10 Both input tones at –7 dBFS; two tone intermodulation distortion (IMD) rejection is the rati o of either tone to the worst 3rd order intermod product. f1 = 10.0 MHz
± 100 kHz, 50 kHz f1 – f2 300 kHz.
11Channel-to-channel isolation tested with A channel grounded and a full-scale signal applied to B channel (AIN1).
12 Input driven to 2× and 4× AIN1 range for >4 clock cycles. Output recovers inband in specified time with Encode = 40 MSPS. No foldover guaranteed.
13 Outputs are sourcing 10 µA.
14 Outputs are sinking 10 µA.
All specifications guaranteed within 100 ms of initial power up regardless of sequencing.
Specifications subject to change without notice.
REV. A
–3–


3Pages


5962-9581501HXA 電子部品, 半導体
AD10242
DEFINITION OF SPECIFICATIONS
Analog Bandwidth
The analog input frequency at which the spectral power of the
fundamental frequency (as determined by the FFT analysis) is
reduced by 3 dB.
Aperture Delay
The delay between the 50% point of the rising edge of the
ENCODE command and the instant at which the analog input
is sampled.
Aperture Uncertainty (Jitter)
The sample-to-sample variation in aperture delay.
Differential Nonlinearity
The deviation of any code from an ideal 1 LSB step.
Encode Pulse Width/Duty Cycle
Pulse width high is the minimum amount of time that the
ENCODE pulse should be left in logic “1” state to achieve rated
performance; pulse width low is the minimum time ENCODE
pulse should be left in low state. At a given clock rate, these
specs define an acceptable Encode duty cycle.
Harmonic Distortion
The ratio of the rms signal amplitude to the rms value of the
worst harmonic component.
Integral Nonlinearity
The deviation of the transfer function from a reference line mea-
sured in fractions of 1 LSB using a “best straight line” deter-
mined by a least square curve fit.
Minimum Conversion Rate
The encode rate at which the SNR of the lowest analog signal
frequency drops by no more than 3 dB below the guaranteed
limit.
Maximum Conversion Rate
The encode rate at which parametric testing is performed.
Output Propagation Delay
The delay between the 50% point of the rising edge of ENCODE
command and the time when all output data bits are within
valid logic levels.
Overvoltage Recovery Time
The amount of time required for the converter to recover to
0.02% accuracy after an analog input signal of the specified per-
centage of full scale is reduced to midscale.
Power Supply Rejection Ratio
The ratio of a change in input offset voltage to a change in
power supply voltage.
Signal-to-Noise-and-Distortion (SINAD)
The ratio of the rms signal amplitude (set at 1 dB below full
scale) to the rms value of the sum of all other spectral compo-
nents, including harmonics but excluding dc.
Signal-to-Noise Ratio (without Harmonics)
The ratio of the rms signal amplitude (set at 1 dB below full
scale) to the rms value of the sum of all other spectral compo-
nents, excluding the first five harmonics and dc.
Spurious-Free Dynamic Range
The ratio of the rms signal amplitude to the rms value of the
peak spurious spectral component. The peak spurious compo-
nent may or may not be a harmonic. May be reported in dBc
(i.e., degrades as signal levels is lowered) or in dBFS (always re-
lated back to converter full scale).
Transient Response
The time required for the converter to achieve 0.02% accuracy
when a one-half full-scale step function is applied to the analog
input.
Two-Tone Intermodulation Distortion Rejection
The ratio of the rms value of either input tone to the rms value
of the worst third order intermodulation product; reported in
dBc.
Two-Tone SFDR
The ratio of the rms value of either input tone to the rms value
of the peak spurious component. The peak spurious compo-
nent may or may not be an IMD product. May be reported
in dBc (i.e., degrades as signal levels is lowered) or in dBFS
(always related back to converter full scale).
–6– REV. A

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部品番号部品説明メーカ
5962-9581501HXA

Dual/ 12-Bit/ 40 MSPS MCM A/D Converter with Analog Input Signal Conditioning

Analog Devices
Analog Devices


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