DataSheet.jp

E5530 の電気的特性と機能

E5530のメーカーはTEMIC Semiconductorsです、この部品の機能は「128-Bit IDIC for Radio Frequency Identification」です。


製品の詳細 ( Datasheet PDF )

部品番号 E5530
部品説明 128-Bit IDIC for Radio Frequency Identification
メーカ TEMIC Semiconductors
ロゴ TEMIC Semiconductors ロゴ 




このページの下部にプレビューとE5530ダウンロード(pdfファイル)リンクがあります。

Total 5 pages

No Preview Available !

E5530 Datasheet, E5530 PDF,ピン配置, 機能
e5530
128-Bit IDIC® for Radio Frequency Identification
Description
The e5530 is part of a closed coupled identification
system. It receives power from an RF transmitter which
is coupled inductively to the IDIC®. The frequency is
typically 100 to 450 kHz. Receiving RF, the IDIC®
responds with a data stream by damping the incoming RF
Features
D Low power, low voltage CMOS
D Rectifier, voltage limiter, clock extraction
on-chip (no battery)
D Small size
D Factory laser programmable ROM
D Operating temperature range –40 to +125°C
D Radio Frequency (RF): 100 to 450 kHz
D Transmission options
Code length: 128, 96, 64, 32 bits
via an internal load. This damping-in-turn can be detected
by the interrogator. The identifying data are stored in a
128 bit PROM on the e5530, realized as an array of laser-
programmable fuses. The logic block diagram for the
e5530 is shown in figure 2. The data are output bit-
serially as a code of length 128, 96, 64 or 32 bits. The
chips are factory-programmed with a unique code.
Bitrate [bit/s]:
Modulation:
Application
RF/8,RF/16, RF/32, RF/40,
RF/50, RF/64, RF/80, RF/100,
RF/128, RF/256
FSK, PSK, BIPH, Manchester
BIPH-FSK
RF transmitter
and
interrogator
RF
Figure 1. Application
IDIC®
e5530
95 10318
Analog front end
Mod
Load
Coil
Modulator
FSK
PSK
BIPH
Manchester
Clock
extractor
Clk
Data
R7
R6
R5
R4
R3
R2
R1
R0
95 10155
128 bit PROM
Coil
Rectifier
VDD VSS
Bitrate
Figure 2. Block diagram
IDIC® stands for IDentification Integrated Circuit and is a trademark of TEMIC.
Rev. A3, 17-Sep-98
Column decoder
Counter
1 (5)

1 Page





E5530 pdf, ピン配列
e5530
PSK
A logical “1” causes (at the end of the bit period) a 180°
phase shift on the carrier frequency, while a logical “0”
causes no phase shift. The carrier frequency is RF/2.
BIPH
Logical “1” produces a signal which is the same as the bit-
clock and a logical “0” produces a signal of twice the
bitclock period.
Manchester
A logical “1” causes a positive edge in the middle of a bit
period, while a logical “0” causes negative edge.
A combination of BIPH- and FSK-modulation is also
optionally available. The available combinations be-
tween the modulation types and the bitrates are shown in
table “Transmission Options”.
DataClk
Data
FSK
PSK
Man
Biph
95 10278
1011001
Figure 5. Timing diagram for modulation options
Absolute Maximum Ratings
Parameters
Maximum current into Coil1 and Coil2
Maximum power dissipation (dice)
Maximum ambient air temperature with voltage applied
Storage temperature
Symbol
Icoil
Ptot
Tamb
Tstg
Value
10
100
–40 to +125
–65 to +150
Unit
mA
mW*
°C
°C
* Free-air condition. Time of application: 1 s
Stresses above those listed under ‘Absolute Maximum Ratings’ may cause permanent damage to the device.
Functional operation of the device at these conditions is not imlied.
Rev. A3, 17-Sep-98
3 (5)


3Pages





ページ 合計 : 5 ページ
 
PDF
ダウンロード
[ E5530 データシート.PDF ]


データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。


共有リンク

Link :


部品番号部品説明メーカ
E5530

128-bit Read-only IDIC for RF Identification

ATMEL Corporation
ATMEL Corporation
E5530

128-Bit IDIC for Radio Frequency Identification

TEMIC Semiconductors
TEMIC Semiconductors
E5530H-232-DIT

128-bit Read-only IDIC for RF Identification

ATMEL Corporation
ATMEL Corporation
E5530H-232-DIT

128-Bit IDIC for Radio Frequency Identification

TEMIC Semiconductors
TEMIC Semiconductors


www.DataSheet.jp    |   2020   |  メール    |   最新    |   Sitemap