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PDF FQP3P20 Data sheet ( Hoja de datos )
| Número de pieza | FQP3P20 | |
| Descripción | 200V P-Channel MOSFET | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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FQP3P20
200V P-Channel MOSFET
April 2000
QFETTM
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switching DC/DC converters.
Features
• -2.8A, -200V, RDS(on) = 2.7Ω @VGS = -10 V
• Low gate charge ( typical 6.0 nC)
• Low Crss ( typical 7.5 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
GD S
TO-220
FQP Series
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
Parameter
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Drain-Source Voltage
Drain Current
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
- Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8 from case for 5 seconds
Thermal Characteristics
Symbol
RθJC
RθCS
RθJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Case-to-Sink
Thermal Resistance, Junction-to-Ambient
G!
S
!
!
D
FQP3P20
-200
-2.8
-1.77
-11.2
±30
150
-2.8
5.2
-5.5
52
0.42
-55 to +150
300
Typ Max
-- 2.4
0.5 --
-- 62.5
©2000 Fairchild Semiconductor International
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/°C
°C
°C
Units
°CW
°CW
°CW
Rev. A, April 2000
1 page  
Gate Charge Test Circuit & Waveform
50K
Same Type
as DUT
12V 200nF
300nF
VGS
-10V
Qg
VGS
VDS
Qgs Qgd
-3mA
DUT
Charge
Resistive Switching Test Circuit & Waveforms
-10V
VDS
VGS
RG
RL
VDD
DUT
td(on)
VGS 10%
t on
tr
VDS
90%
t off
td(off)
tf
Unclamped Inductive Switching Test Circuit & Waveforms
L
VDS
ID
EAS =
--1--
2
L IAS2
BVDSS
--------------------
BVDSS - VDD
t p Time
RG
VDD
VDD
ID (t)
VDS (t)
-10V
tp
DUT
IAS
BVDSS
©2000 Fairchild Semiconductor International
Rev. A, April 2000
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet FQP3P20.PDF ] | |
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