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FOD2200のメーカーはFairchild Semiconductorです、この部品の機能は「LOW INPUT CURRENT LOGIC GATE OPTOCOUPLERS」です。 |
部品番号 | FOD2200 |
| |
部品説明 | LOW INPUT CURRENT LOGIC GATE OPTOCOUPLERS | ||
メーカ | Fairchild Semiconductor | ||
ロゴ | |||
このページの下部にプレビューとFOD2200ダウンロード(pdfファイル)リンクがあります。 Total 14 pages
LOW INPUT CURRENT
LOGIC GATE OPTOCOUPLERS
FOD2200
DESCRIPTION
The FOD2200 is an optically coupled logic gate that combine an AlGaAs LED
and an integrated high gain photo detector. The detector has a three state
output stage and has a detector threshold with hysteresis. The three state
output eliminates the need for a pullup resistor and allows for direct drive of
data busses. The hysteresis provides differential mode noise immunity and
eliminates the potential for output signal chatter.
The Electrical and Switching Characteristics of the FOD2200 are guaranteed
over the temperature range of 0°C to 85°C and a VCC range of 4.5 volts to 20
volts. Low IF and wide VCC range allow compatibility with TTL, LSTTL, and
CMOS logic and result in lower power consumption compared to other high
speed optocouplers. Logic signals are transmitted with a maximum propaga-
tion delay of 300 nsec. The FOD2200 is useful for isolating high speed logic
interfaces, buffering of input and output lines, and implementing isolated line
receivers in high noise environments.
8
1
8
1
8
1
FEATURES
• 1 kV/µs Minimum Common Mode
Rejection
• Compatible with LSTTL, TTL, and CMOS
Logic
• Wide VCC Range (4.5 to 20 V)
• 2.5 Mbd Guaranteed over Temperature
• Low Input Current (1.6 mA)
• Three State Output (No Pullup Resistor
Required)
• Guaranteed Performance from 0°C to 85°C
• Hysteresis
• Safety Approvals Pending – UL, CSA, VDE
• VISO = 5kVRMS
APPLICATION
• Isolation of High Speed Logic Systems
• Computer-Peripheral Interfaces
• Microprocessor System Interfaces
• Ground Loop Elimination
• Pulse Transformer Replacement
• Isolated Buss Driver
• High Speed Line Receiver
NC 1
ANODE 2
CATHODE 3
NC 4
Schematic
IF
+
2
VF
–
3
SHIELD
SHIELD
8 VCC
7 VO
6 VE
5 GND
ICC
VCC
8
IO
7 VO
IE
6 VE
GND
5
TRUTH TABLE (Positive Logic)
LED
On
Off
On
Off
Enable
H
H
L
L
© 2004 Fairchild Semiconductor Corporation
Page 1 of 14
Output
Z
Z
H
L
7/7/04
1 Page LOW INPUT CURRENT
LOGIC GATE OPTOCOUPLERS
FOD2200
ELECTRICAL CHARACTERISTICS (TA = 0°C to +85°C, VCC = 4.5V to 20V, IF(ON) = 1.6mA to 5mA,
VEH = 2V to 20V, VEL = 0V to 0.8V, IF(OFF) = 0 mA to 0.1 mA Unless otherwise specified.) See Note 1.
INDIVIDUAL COMPONENT CHARACTERISTICS
Parameter
Test Conditions Symbol Min Typ** Max Unit
EMITTER
Input Forward Voltage
Input Reverse Breakdown Voltage
Input Capacitance
Input Diode Temperature Coefficient
DETECTOR
(IF = 5 mA)
TA =25°C
(IR = 10 µA)
(Pins 2 & 3) (VF = 0, f = 1 MHz)
(IF = 5 mA)
VF
BVR
CIN
∆VF/∆TA
5.0
1.75
1.40 1.7
60
-1.4
V
V
pF
mV/°C
High Level Supply Current
Low Level Supply Current
Low Level Enable Current
High Level Enable Current
High Level Enable Voltage
Low Level Enable Voltage
(IF = 5 mA)
(IO = Open, VE = Don’t care)
(IF = 0 )
(IO = Open, VE = Don’t care)
VCC = 5.5V
VCC = 20V
VCC = 5.5V
VCC = 20V
VE = 0.4 V
VE = 2.7 V
VE = 5.5 V
VE = 20 V
ICCH
ICCL
IEL
IEH
VEH
VEL
3.5 4.5
4.0 6.0
4.4 6.0
5.2 7.5
-0.1 -0.32
20
100
0.005 250
2.0
0.8
mA
mA
mA
µA
V
V
SWITCHING CHARACTERISTICS (TA = 0°C to +85°C, IF(ON) = 1.6mA to 5mA, IF(OFF) = 0 to 0.1 mA,
VCC = 4.5 to 20V Unless otherwise specified.)
AC Characteristics
Test Conditions Symbol Min Typ** Max Unit
Propagation Delay Time
to Output High Level
(Note 2, 4)
(Fig. 1) With Peaking Capacitor
Propagation Delay Time
to Output Low Level
(Note 3, 4)
(Fig. 1) With Peaking Capacitor
Output Rise Time (10-90%)
(Note 5) (Fig. 1)
Output Fall Time (90-10%)
(Note 6) (Fig. 1)
Enable Propagation Delay Time
to Output High Level
(Fig. 2)
Enable Propagation Delay Time
to Output Low Level
(Fig. 2)
Disable Propagation Delay Time from Output High Level
(Fig. 2)
Disable Propagation Delay Time from Output Low Level
(Fig. 2)
Common Mode
Transient Immunity
(at Output High Level)
(TA =25°C)
(IF = 1.6 mA, VOH (Min.) = 2.0 V) |VCM| = 50 V
VCC = 5V (Note 7)(Fig. 3)
Common Mode
Transient Immunity
(at Output Low Level)
(TA =25°C)
(IF = 0 mA, VOL (Max.) = 0.8 V) |VCM| = 50 V
VCC = 5V (Note 8)(Fig. 3)
** Typical values at TA = 25°C, VCC = 5V, IF(ON) = 3 mA unless otherwise specified.
TPLH
TPHL
tr
tf
tPZH
tPZL
TPHZ
TPLZ
|CMH|
|CML|
1000
1000
120
180
80
25
40
50
95
80
300 ns
300 ns
ns
ns
ns
ns
ns
ns
V/µs
V/µs
© 2004 Fairchild Semiconductor Corporation
Page 3 of 14
7/7/04
3Pages LOW INPUT CURRENT
LOGIC GATE OPTOCOUPLERS
PULSE GEN.
tr = tf = 5 ns
f = 100 kHz
10 % DUTY
CYCLE
VO = 5 V
INPUT
MONITORING
NODE
IF
1
2
3
R1 C1 = 4
120 pF
FOD2200
VCC 8
7
6
GND 5
VCC
OUTPUT VO
MONITORING
NODE
5V
D1 619 Ω
C2 =
15 pF
5 kΩ
D2
D3
D4
INPUT IF
THE PROBE AND JIG CAPACITANCES
ARE INCLUDED IN C1 AND C2.
RI 2.15 kΩ 1.10 kΩ 681 Ω
IF (ON) 1.6 mA 3 mA 5 mA
ALL DIODES ARE 1N916 OR 1N3064.
IF (ON)
50 % IF (ON)
0 mA
OUTPUT
VO
tPLH tPHL
VOH
1.3 V
VOL
Fig. 1. Test Circuit and Waveforms for tPLH, tPHL, tr and tf.
PULSE
GENERATOR
ZO = 50 Ω
tr = tf = 5 ns
CL= 15 pF INCLUDING PROBE
AND JIG CAPACITANCES.
VCC
FOD2200
VO
+5 V
S1
1 VCC 8
IF 2
7
D1 619 Ω
INPUT VC
MONITORING
NODE
3
4
6
GND 5
CL
5 kΩ
D2
D3
D4
S2
D1-4 ARE 1N916 OR 1N3064.
INPUT
VE
tPZL
tPLZ
OUTPUT
VO
OUTPUT
VO
S1 CLOSED
S2 OPEN
tPZH
S1 OPEN
S2 CLOSED
1.3 V 0.5 V
0.5 V
1.3 V
0V
tPHZ
3.0 V
1.3 V
0V
S1 AND
S2 CLOSED
VOL
VOH
≈1.5 V
S1 AND
S2 CLOSED
Fig. 2. Test Circuit and Waveforms for tPHZ, tPZH, tPLZ, and tPZL
© 2004 Fairchild Semiconductor Corporation
Page 6 of 14
FOD2200
7/7/04
6 Page | |||
ページ | 合計 : 14 ページ | ||
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部品番号 | 部品説明 | メーカ |
FOD2200 | LOW INPUT CURRENT LOGIC GATE OPTOCOUPLERS | Fairchild Semiconductor |
FOD2200S | LOW INPUT CURRENT LOGIC GATE OPTOCOUPLERS | Fairchild Semiconductor |
FOD2200SD | LOW INPUT CURRENT LOGIC GATE OPTOCOUPLERS | Fairchild Semiconductor |
FOD2200SDV | LOW INPUT CURRENT LOGIC GATE OPTOCOUPLERS | Fairchild Semiconductor |