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PDF M2732A Data sheet ( Hoja de datos )
| Número de pieza | M2732A | |
| Descripción | NMOS 32K 4K x 8 UV EPROM | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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M2732A
NMOS 32K (4K x 8) UV EPROM
FAST ACCESS TIME: 200ns
EXTENDED TEMPERATURE RANGE
SINGLE 5V SUPPLY VOLTAGE
LOW STANDBY CURRENT: 35mA max
INPUTS and OUTPUTS TTL COMPATIBLE
DURING READ and PROGRAM
COMPLETELY STATIC
24
1
FDIP24W (F)
DESCRIPTION
The M2732A is a 32,768 bit UV erasable and
electrically programmable memory EPROM. It is
organized as 4,096 words by 8 bits. The M2732A
with its single 5V power supply and with an access
time of 200 ns, is ideal suited for applications where
fast turn around and pattern experimentation one
important requirements.
The M2732A is honsed in a 24 pin Window Ceramic
Frit-Seal Dual-in-Line package. The transparent lid
allows the user to expose the chip to ultraviolet light
to erase the bit pattern. A new pattern can be then
written to the clerice by following the programming
procedure.
Figure 1. Logic Diagram
VCC
12
A0-A11
8
Q0-Q7
Table 1. Signal Names
A0 - A11
Address Inputs
Q0 - Q7
Data Outputs
E Chip Enable
GVPP
VCC
VSS
Output Enable / Program Supply
Supply Voltage
Ground
E
GVPP
M2732A
VSS
AI00780B
July 1994
1/9
1 page  
M2732A
Table 5. Read Mode DC Characteristics (1)
(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC)
Symbol
Parameter
Test Condition
Value
Min Max
ILI Input Leakage Current
0 ≤ VIN ≤ VCC
±10
ILO Output Leakage Current
VOUT = VCC
±10
ICC Supply Current
E = VIL, G = VIL
125
ICC1 Supply Current (Standby)
E = VIH, G = VIL
35
VIL Input Low Voltage
–0.1 0.8
VIH Input High Voltage
2 VCC + 1
VOL Output Low Voltage
IOL = 2.1mA
0.45
VOH Output High Voltage
IOH = –400µA
2.4
Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
Unit
µA
µA
mA
mA
V
V
V
V
Table 6. Read Mode AC Characteristics (1)
(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC)
Symbol Alt
Parameter
Test
Condition
-2, -20
M2732A
blank, -25
-3
Min Max Min Max Min Max
tAVQV
tACC
Address Valid to
Output Valid
E = VIL,
G = VIL
200 250 300
tELQV
tCE
Chip Enable Low to
Output Valid
G = VIL
200 250 300
tGLQV
tOE
Output Enable Low
to Output Valid
E = VIL
100 100 150
tEHQZ (2)
tDF
Chip Enable High to
Output Hi-Z
G = VIL
0 60 0 60 0 130
tGHQZ (2)
tDF
Output Enable High
to Output Hi-Z
E = VIL
0 60 0 60 0 130
tAXQX
tOH
Address Transition to
Output Transition
E = VIL,
G = VIL
0
0
0
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
2. Sampled only, not 100% tested.
-4
Min Max
450
450
150
0 130
0 130
0
Unit
ns
ns
ns
ns
ns
ns
5/9
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet M2732A.PDF ] | |
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