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ATtiny2313V-8PJ の電気的特性と機能

ATtiny2313V-8PJのメーカーはATMEL Corporationです、この部品の機能は「8-bit AVR Microcontroller with 2K Bytes In-System Programmable Flash」です。


製品の詳細 ( Datasheet PDF )

部品番号 ATtiny2313V-8PJ
部品説明 8-bit AVR Microcontroller with 2K Bytes In-System Programmable Flash
メーカ ATMEL Corporation
ロゴ ATMEL Corporation ロゴ 




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ATtiny2313V-8PJ Datasheet, ATtiny2313V-8PJ PDF,ピン配置, 機能
Features
Utilizes the AVR® RISC Architecture
AVR – High-performance and Low-power RISC Architecture
– 120 Powerful Instructions – Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
Data and Non-volatile Program and Data Memories
– 2K Bytes of In-System Self Programmable Flash
Endurance 10,000 Write/Erase Cycles
– 128 Bytes In-System Programmable EEPROM
Endurance: 100,000 Write/Erase Cycles
– 128 Bytes Internal SRAM
– Programming Lock for Flash Program and EEPROM Data Security
Peripheral Features
– One 8-bit Timer/Counter with Separate Prescaler and Compare Mode
– One 16-bit Timer/Counter with Separate Prescaler, Compare and Capture Modes
– Four PWM Channels
– On-chip Analog Comparator
– Programmable Watchdog Timer with On-chip Oscillator
– USI – Universal Serial Interface
– Full Duplex USART
Special Microcontroller Features
– debugWIRE On-chip Debugging
– In-System Programmable via SPI Port
– External and Internal Interrupt Sources
– Low-power Idle, Power-down, and Standby Modes
– Enhanced Power-on Reset Circuit
– Programmable Brown-out Detection Circuit
– Internal Calibrated Oscillator
I/O and Packages
– 18 Programmable I/O Lines
– 20-pin PDIP, 20-pin SOIC, and 32-pin MLF
Operating Voltages
– 1.8 - 5.5V (ATtiny2313)
Speed Grades
– ATtiny2313V: 0 - 2 MHz @ 1.8 - 5.5V, 0 - 8 MHz @ 2.4 - 5.5V
– ATtiny2313: 0 - 8 MHz @ 2.7 - 5.5V, 0 - 16 MHz @ 4.5 - 5.5V
Power Consumption Estimates
– Active Mode
1 MHz, 1.8V: 300 µA
32 kHz, 1.8V: 20 µA (including oscillator)
– Power-down Mode
< 0.2 µA at 1.8V
8-bit
Microcontroller
with 2K Bytes
In-System
Programmable
Flash
ATtiny2313/V
Preliminary
Rev. 2543C–AVR–12/03
1

1 Page





ATtiny2313V-8PJ pdf, ピン配列
Overview
Block Diagram
2543C–AVR–12/03
ATtiny2313/V
The ATtiny2313 is a low-power CMOS 8-bit microcontroller based on the AVR
enhanced RISC architecture. By executing powerful instructions in a single clock cycle,
the ATtiny2313 achieves throughputs approaching 1 MIPS per MHz allowing the system
designer to optimize power consumption versus processing speed.
Figure 2. Block Diagram
PA0 - PA2
PORTA DRIVERS
VCC
GND
DATA REGISTER
PORTA
DATA DIR.
REG. PORTA
8-BIT DATA BUS
PROGRAM
COUNTER
PROGRAM
FLASH
INSTRUCTION
REGISTER
INSTRUCTION
DECODER
CONTROL
LINES
PROGRAMMING
LOGIC
STACK
POINTER
SRAM
GENERAL
PURPOSE
REGISTER
ALU
STATUS
REGISTER
SPI
XTAL1
XTAL2
INTERNAL
CALIBRATED
OSCILLATOR
INTERNAL
OSCILLATOR
WATCHDOG
TIMER
MCU CONTROL
REGISTER
MCU STATUS
REGISTER
TIMER/
COUNTERS
INTERRUPT
UNIT
EEPROM
USI
OSCILLATOR
TIMING AND
CONTROL
RESET
ON-CHIP
DEBUGGER
USART
DATA REGISTER
PORTB
DATA DIR.
REG. PORTB
PORTB DRIVERS
DATA REGISTER
PORTD
DATA DIR.
REG. PORTD
PORTD DRIVERS
PB0 - PB7
PD0 - PD6
3


3Pages


ATtiny2313V-8PJ 電子部品, 半導体
AVR CPU Core
Introduction
Architectural Overview
This section discusses the AVR core architecture in general. The main function of the
CPU core is to ensure correct program execution. The CPU must therefore be able to
access memories, perform calculations, control peripherals, and handle interrupts.
Figure 3. Block Diagram of the AVR Architecture
Flash
Program
Memory
Instruction
Register
Instruction
Decoder
Control Lines
Program
Counter
Data Bus 8-bit
Status
and Control
32 x 8
General
Purpose
Registrers
ALU
Interrupt
Unit
SPI
Unit
Watchdog
Timer
Analog
Comparator
Data
SRAM
EEPROM
I/O Module1
I/O Module 2
I/O Module n
I/O Lines
In order to maximize performance and parallelism, the AVR uses a Harvard architecture
– with separate memories and buses for program and data. Instructions in the program
memory are executed with a single level pipelining. While one instruction is being exe-
cuted, the next instruction is pre-fetched from the program memory. This concept
enables instructions to be executed in every clock cycle. The program memory is In-
System Reprogrammable Flash memory.
The fast-access Register File contains 32 x 8-bit general purpose working registers with
a single clock cycle access time. This allows single-cycle Arithmetic Logic Unit (ALU)
operation. In a typical ALU operation, two operands are output from the Register File,
6 ATtiny2313/V
2543C–AVR–12/03

6 Page



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共有リンク

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部品番号部品説明メーカ
ATtiny2313V-8PI

8-bit AVR Microcontroller with 2K Bytes In-System Programmable Flash

ATMEL Corporation
ATMEL Corporation
ATtiny2313V-8PJ

8-bit AVR Microcontroller with 2K Bytes In-System Programmable Flash

ATMEL Corporation
ATMEL Corporation


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